Third International Green Computing Conference (IGCC'12) – Extended deadlines

Submitted by John Owens
January 20, 2012

Submitted by John Owens
June 5-8, 2012 in San Jose, California, USA

IGCC’12 will provide a forum for presenting and discussing innovative
research on a broad range of topics in the fields of sustainable and
energy-efficient computing, and computing for a more sustainable
planet. The conference will hold a technical program, panels,
workshops, and tutorials on these topics. IGCC’12 will be technically
co-sponsored by the IEEE. Topics of interest include, but are not
limited to:

Sustainable Computing
* Power-aware algorithms and protocols
* Power-aware software and hardware
* Low-power electronics and systems
* Application-specific ASICs and FPGAs
* Sensing and monitoring
* Characterization, metrics, and modeling
* Reliability, thermal behavior and control
* Power-efficient delivery and cooling
* Life-cycle analysis of IT equipment

Computing for Sustainability
* Renewable energy models and prediction
* Matching energy supply and demand
* Smart grid and microgrids
* Smart transportation and manufacturing
* Smart buildings and urban development
* Energy harvesting, storage, and recycling
* Climate and ecosystem monitoring
* Using IT to reduce carbon emissions
* Carbon metering and user feedback

IGCC’12 welcomes submissions that have not been published and that are
not under review by another conference or journal. All submissions
will be evaluated on their originality, technical soundness,
significance, presentation, and interest to the conference attendees.
Submissions must not exceed 10 letter-size pages using the IEEE format
for conference proceedings. Papers must be received by the submission
deadline to be considered for presentation.

Best paper award and journal publication
The Technical Committee will select the best paper as well as several
papers to be extended and considered by the Journal on Sustainable

Workshops and tutorials
Proposals are solicited for workshops and tutorials to be held in
conjunction with the conference. Proposals should be submitted to the
Workshops and Tutorials Chairs. Additional details are available at

Important dates
Abstract submission: Extended to January 20, 2012 at 11:59pm US Pacific time
Paper submission: Extended to January 27, 2012 at 11:59pm US Pacific time
Notifications sent to authors: April 4, 2012
Camera-ready papers due: May 1, 2012

General chairs:
David Culler (UC Berkeley), Behrooz Shirazi (Wash. State Univ.)

Program chairs:
Ricardo Bianchini (Rutgers Univ.), Fred Chong (UC Santa Barbara)

Program committee:
Tarek F. Abdelzaher UI Urbana-Champaign
Hakan Aydin George Mason Univ.
Cullen Bash HP Labs
Kirk W. Cameron Virginia Tech
John Carter IBM Research
Prabal Dutta Univ. of Michigan
Klaus Fichter Borderstep Institute
Rodrigo Fonseca Brown Univ.
Eugene Gorbatov Intel Research
Rajesh Gupta UC San Diego
Sandeep Gupta Arizona State Univ.
Sudhanva Gurumurthi Univ. of Virginia
Mor Harchol-Balter Carnegie Mellon Univ.
Canturk Isci IBM Research
Mahmut Kandemir Penn State Univ.
Aman Kansal Microsoft Research
Krishna Kant National Science Foundation
Randy H. Katz UC Berkeley
Dejan Kostic EPFL
Christos Kozyrakis Stanford Univ.
Ulrich Kremer Rutgers Univ.
Benjamin C. Lee Duke Univ.
Tao Li Univ. of Florida
Srilatha Manne AMD
Ethan L. Miller UC Santa Cruz
Onur Mutlu Carnegie Mellon Univ.
Manish Parashar Rutgers Univ.
Massoud Pedram Univ. of Southern California
Kirk Pruhs Univ. of Pittsburgh
Partha Ranganathan HP Labs
Tajana S. Rosing UC San Diego
Martin Schulz Lawrence Livermore National Lab.
Ankur Srivastava Univ. of Maryland
Mani Srivastava UC Los Angeles
Michael Taylor UC San Diego
Bhuvan Urgaonkar Penn State Univ.
Xiaorui Wang Ohio State Univ.
Thomas F. Wenisch Univ. of Michigan

Workshops chair:
Sanjay Ranka (Univ. of Florida)

Publications chair:
Saeed Rajput (Nova Southeastern Univ.)

Publicity chairs:
Giuseppe Anastasi (Universita di Pisa, Italy), John Owens (UC Davis)

Submissions chair:
Guoping Long (Institute of Software, Chinese Academy of Sciences)

Steering committee:
Ishfaq Ahmad Co-Chair, UT Arlington
Rajesh Gupta UC San Diego
Sandeep Gupta Arizona State Univ.
Ali Hurson Missouri Univ. of Science and Technology
Ashfaq Khokhar UI Chicago
Francis Lau Univ. of Hong Kong
Sanjay Ranka Univ. of Florida
Behrooz Shirazi Co-Chair, Wash. State Univ.

FastPath 2012

Submitted by Erik Altman
February 9, 2012

Submitted by Erik Altman

Workshop on Performance Modeling and Analysis of Workload Optimized Systems
To be held with the ISPASS Conference:

The goal of FastPath is to bring together researchers and practitioners
involved in cross-stack hardware/software performance analysis, modeling,
and evaluation of workload optimized systems.

The goal is increasingly important as the slowdown in Moore’s Law makes
it more compelling to optimize systems around specific workloads. Such
workload optimized systems have hardware and/or software specifically
designed to run well for a particular application or application class.
Such systems include, but are not limited to traditional CPUs assisted
with accelerators (ASICs, FPGAs, GPUs), memory accelerators, I/O
accelerators, hybrid systems, and IT appliances. This workload optimized
system approach contrasts to the broad general purpose direction of
computing over many decades. However, the workload optimized systems
approach is growing in importance, as we see in systems from cellphones
to tablets to routers to game machines to Top500 supercomputers, and IT
appliances such as IBM’s DataPower and Netezza, and Oracle’s Exadata.


FastPath seeks to facilitate the exchange of ideas on performance modeling,
analysis and evaluation of workload optimized systems and seeks 6-page
research papers on a wide range of topics including, but not limited to:

o Workloads o GPUs
o Simulators o FPGAs
o Measured results on accelerated systems o ASIC Accelerators
o Industrial Experiences o Programming Models
o Analytical Techniques o Runtime Management Systems

Please make submissions here:

Additional details are on our website:

Submission: February 9, 2012
Notification: March 12, 2012
Final Materials Due: March 23, 2012
Workshop April 1, 2012

General Co-Chairs: David Brooks, Parijat Dube
Program Committee Co-Chairs: Erik Altman, Lieven Eeckhout

Publicity Chair: Peter Sweeney
Web Chair: Augusto Vega


Power Management of Multicore Systems Tutorial

Submitted by Robert Mullins
March 4, 2012

Submitted by Robert Mullins

Power Management of Multicore Systems:
Challenges, Approaches, and Recent Developments

ASPLOS 2012 Tutorial

Radu Marculescu, Carnegie Mellon Univ.
Umit Y. Ogras, Intel Corp.
Siddharth Garg, Univ. of Waterloo

This full-day tutorial will be held on Sunday, March 4, 2012.

Continuous technology scaling allows hundreds of processing cores to
run multiple heterogeneous applications concurrently on a single
chip. However, on-chip power consumption represents one of the main
bottlenecks in providing increased performance and enhanced
capabilities for such platforms. Indeed, increased power consumption
results not only in higher on-die temperature and reduced lifetime
reliability, but also leads to faster discharge of battery-powered
mobile devices. On-chip power management is therefore a critical
component of run time multicore optimization in presence of workload
and process-driven variations.

Power management techniques for single core processor are well
established. For example, current commercial products support numerous
sleep and performance states. However, orchestrating power management
policies for processors consisting of many cores interconnected by an
on-chip network is much less addressed. The multiple voltage and
frequency island (VFI) design style with support for dynamic voltage
and frequency scaling (DVFS) was recently proposed as an effective
paradigm to deal with application heterogeneity in highly parallel
multi-core platforms. Such systems are divided into multiple VFIs
where the voltage and frequency of each island in the system can be
set independently of all other islands and can be adapted at run-time
in response to temporal variations in application characteristics.

Starting from these overarching ideas, this tutorial addresses some
fundamental issues of designing effective and highly scalable DVFS
control algorithms able to regulate the voltage and frequency of the
VFIs in large multi-core platforms in response to application
heterogeneity and process-driven variations. In order to understand
the challenges and opportunities in this problem space, this tutorial
presents a comprehensive review of advanced design techniques for
multi-domain power and thermal management for high-performance
processors and low power systems-on-chip (SoCs). Finally, we discuss
fundamental limits on the performance of such control algorithms for
power management due to the challenges introduced by technology
scaling and process variations, particularly with respect to emerging
thousand core platforms.

Intended Audience
This tutorial is intended for an audience relatively new to the design
and optimization techniques for power- and variability-aware design
and management of multicore systems, with a minimal background in
micro-architecture, VLSI, and design automation techniques. The
presentation will introduce the relevant background material, give an
overview of the current state-of-the-art results in VFI and Globally
Asynchronous Locally Synchronous alternatives for designing the
communication infrastructure, and finally, talk about run-time
resource optimization and dynamic power management in the presence of
workload and parameter variations. The material discussed in this
tutorial is highly relevant to system designers and software
developers interested in the future of multi- and many-core systems.

Topics to be covered
Multicore Platforms Overview
Multi-voltage/clock domain server, cell phone, and media processors
Network-based communication and multiple voltage-frequency island (VFI) design
Industrial examples: Intel 80-core design, Intel SCC 48-core, Tilera, etc.
Control and Power Management: Algorithms and Implementation
Dynamic control of multi-VFI designs at micro-architecture/OS/application-level
Centralized, distributed, and hierarchical approaches for power and
thermal management
Implementation complexity and practical evaluations using Intel SCC platform
DVFS Control in Presence of Process Variations
Variation-aware dynamic power and thermal management
Power and thermal management for 3-D architectures
Scalability and workload challenges for thousand core platforms


Submitted by Don Draper
March 30, 2012

Submitted by Don Draper

HOT CHIPS 24: A Symposium on High-Performance Chips

Stanford University, Palo Alto, California

August 2012

Deadline for submissions: March 30, 2012
Notification of acceptance: May 1, 2012
Deadline for final version: July 1, 2012

* General Purpose Processor Chips
– High-Performance and Low-Power
– Multi-Core and Highly-Reliable Systems

* Mobile and Embedded Devices
– Graphics/Multimedia/Game
– SoC, Security, and DSP chips

* Communications and Networking
– Wireless LAN/WAN/PAN
– Network and IO Processors

* Other Chips
– FPGAs and FPGA-Based Systems
– Memory Technologies and Chipsets

* Software for multi-Core and Heterogeneous Systems
– Programming models, Runtime Systems
– Compilers and Operating Systems
– Performance and Power Debug and Evaluations

* Other Technologies
– Power and Thermal Management
– Packaging and Testing
– Display Technologies
– On-Chip Optics & Sensors
– Novel Computing Technologies

Presentations at HOT CHIPS are in the form of
30-minute talks in PowerPoint or .PDF. Presentation
slides will be published in the HOT CHIPS Proceedings.
Participants are not required to submit written
papers, but a select group will be invited to submit
a paper for inclusion in a special issue of IEEE Micro.

A limited number of Student Posters describing applied
research performed at a university will be accepted for
presentation at the conference. Student poster submissions
consist of 4 slides and a one-page summary. The most
outstanding poster will receive a Best Poster Award.

Submissions must specify “Presentation” or “Student
Poster” and consist of a title, extended abstract
(two pages maximum.), and the presenter’s contact
information (name, affiliation, job title, address,
phone(s), fax, and email). Please indicate whether
you have submitted, intend to submit, or have already
presented or published a similar or overlapping
submission to another conference or journal. Also
indicate if you would like the submission to be held
confidential. If so indicated, these submissions
remain confidential until the first day of the conference.

Submissions are evaluated by the Program Committee on
the basis of performance of the device(s), degree of
innovation, use of advanced technology, potential market
significance, and anticipated interest to the audience.
Research and software contributions will be evaluated
with similar criteria. To the extent that you are
describing a product, you must indicate its status
– design, development, tape out, silicon, shipping, etc.

Submit extended abstracts in plain text or .PDF, which
may contain figures, with a minimum 10-point font by
following instructions on the Hot Chips 24 website:

Authors will be notified of acceptance decisions by May 1,
2012. Send questions relating to the program to the
program chairs at:
and questions relating to conference operation or
organization to the general chair, Larry Lewis, at:

Sponsored by the Technical Committee on Microprocessors
and Microcomputers of the IEEE Computer Society and the
Solid State Circuits Society.

To view Hot Chips 2011 presentations and videos, which are
now open to the public, go to:

Program Committee Co-Chairs:
Christos Kozyrakis Stanford University
Rumi Zahir Intel


Submitted by Dan Tsafrir
February 13, 2012

Submitted by Dan Tsafrir

In cooperation with ACM (pending), IEEE, and USENIX

On behalf of the 2012 Annual International Systems and Storage
Conference (SYSTOR 2012), we invite you to submit original and
innovative papers. The conference will take place in June 4-6, 2012
Haifa, Israel; it is held in cooperation with ACM (pending), IEEE, and

SYSTOR has a broad scope, promoting experimental and practical
computer systems research encompassing the following topics:

* operating systems, computer architecture, and their interaction
* distributed, parallel, and cloud systems
* networking, mobile, wireless, peer-to-peer, and sensor systems
* runtime systems, compilers, and programming languages
* energy/power management
* file and storage systems
* security, privacy, and trust
* virtualization
* embedded and realtime systems
* fault tolerance, reliability, and availability
* deployment, usage, and experience
* performance evaluation and workload characterization

SYSTOR attempts to combine high-quality international systems research
of practical nature with interactions between the relevant industry
and academia communities. We therefore solicit paper submissions in
four separate tracks:

* full research papers
* short research papers
* highlight papers (a small number of exciting research results
accepted to a recent top-tier systems conference or journal;
accepted submissions will not be published in the proceedings)
* industry papers (describing the technologies behind real systems or
products and the; authors of accepted paper decide if they
would be included in the conference proceedings)

Proceedings including all (non-highlight) accepted papers will be
published by ACM. See more details at the conference web site
[]. SYSTOR 2012 will host distinguished keynote
speakers, a posters session, and several social events at the


Paper submission: Feb 13, 2012 (11:59pm GMT)
Paper notification: Mar 26, 2012 (11:59pm GMT)
Camera-ready: Apr 14, 2012 (11:59pm GMT)

Highlights submission: Mar 12, 2012 (11:59pm GMT)
Highlights notification: Mar 26, 2012 (11:59pm GMT)

Poster submission: Apr 30, 2012 (11:59pm GMT)
Poster notification: May 07, 2012 (11:59pm GMT)


Dan Tsafrir, Technion
Erez Zadok, Stony Brook U.


Irfan Ahmad, VMware
Jonathan Appavoo, Boston U.
Yariv Aridor, Intel
Eitan Bachmat, Ben-Gurion U.
Mary Baker, HP Labs
Emery Berger, UMass Amherst
Tsahi Birk, Technion
Bill Bolosky, Microsoft Research
Andre Brinkmann, JGU Mainz
Randal Burns, Johns Hopkins U.
Dilma Da Silva, IBM Watson
Eyal DeLara, U. of Toronto
Peter Desnoyers, Northeastern U.
Shlomi Dolev, Ben-Gurion U.
Matan Erez, UT Austin
Yoav Etsion, BSC
Christof Fetzer, TU Dresden
Roy Fridman, Technion
Tal Garfinkel, VMware
Sharon Goldberg, Boston U.
Thomas Gross, ETH Zurich
Maurice Herlihy, Brown U.
Shivkumar Kalyanaraman, IBM India
Gokul Kandiraju, IBM Watson
Alexander Kipp, U. of Stuttgart
Avi Mendelson, Microsoft
Ethan Miller, UC Santa Cruz
Alan Mislove, Northeastern U.
Gilles Muller, Inria
Toshio Nakatani, IBM Tokyo
Yale Patt, UT Austin
Barbara Pernici, Politecnico di Milano
Donald Porter, Stony Brook U.
Raju Rangaswami, Florida Int’l U.
Luis Rodrigues, IST/INESC-ID
Neeraj Suri, TU Darmstadt
Sivan Toledo, Tel-Aviv U.
Eran Tromer, Tel-Aviv U.
Martin Vechev, ETH Zurich
Andy Wang, Florida State U.
Ric Wheeler, Redhat
Eran Yahav, Technion
Yuanyuan Zhou, UC San Diego

7th International Conference on High-Performance and Embedded Architectures and Compilers

Submitted by Philip Brisk
January 23 to January 25, 2012

Submitted by Philip Brisk

23-25 January 2012, Paris, France

Registration for HiPEAC 2012 is now open at:


The HiPEAC conference aims to become the premier forum for experts in
computer architecture, programming models, compilers and operating
systems for embedded and general-purpose systems. Emphasis is given
on either cross-cutting research (embedded/high performance,
architecture/software stack, etc.) or innovative ideas (new
programming models, novel architecture approaches to cope with
technology constraints or new technologies, etc.).

The conference will be held in Paris, France, at Eurosites George V,
ideally located in the “Triangle d’Or” (Golden Triangle),
famous business district just South of the Champs Elyses:

The 7th HiPEAC conference will be a first in several innovative ways.

* HiPEAC’12 partners with ACM TACO to promote a “journal first” model:

* HiPEAC’12 is a unique research, innovation, training and networking

– 25-30 outstanding journal papers (ACM TACO)
The program of selected papers will be announced on November 23

– 17 workshops and 9 tutorials

– 1 industrial exhibit and 1 European research projects exhibit

– 1 large poster session
Invitation for every student and junior researcher to present a

– 3 keynote speakers
from academia, industry, and the European funding agency

– 1 social event
Dinner cruise on the Seine river

Accomodation: there are several hotels close to the conference venue,
and hundreds of hotels within a few metro stops; since there is no
real low season in Paris, early registration is highly encouraged.
Recommendations will be updated regularly:

The HiPEAC 2012 conference is organized by Universiteit Ghent,
Belgium, and INRIA, France, with the support from the Seventh
Framework Programme (European Commission) and generous donations from
industry sponsors (list and acknowledgment in upcoming communications).

ACM SIGMETRICS/Performance 2012

Submitted by Y. Charlie Hu
February 24, 2012

Submitted by Y. Charlie Hu

Joint International Conference on Measurement
and Modeling of Computer Systems

Imperial College London
11 and 15 June 2012, London, United Kingdom


* Tutorial and Workshop Submission Deadline: 24 February 2012 –
11:59pm GMT
* Notification of Decision: 9 March 2012


The 12th joint ACM SIGMETRICS / Performance conference solicits
proposals for Tutorials on Monday, 11 June 2012 and for Workshops on
Friday, 15 June 2012. If there is an excellent response, it is
possible for us to utilize Saturday, 16 June also, for example for any
planned full day events. The main conference will take place over
three days, 12-14 June 2012.

We welcome proposals related to the development and application of
state-of-the-art, broadly applicable, analytic, simulation and
measurement-based performance evaluation techniques – including
considerations of speed and scalability as well as reliability,
availability, sustainability and manageability of systems. We
encourage both theoretical contributions and submissions relating to
real world empirical studies or focusing on implementation and
experimental issues. Proposals relating to emerging, influential,
tangential areas are appropriate for both Tutorials and Workshops.

WORKSHOPS: Send proposals of 1-2 pages to the General Chair
( ). Please include the
proposed title, outline timetable including a brief description of the
topics in each session, potential invited speaker(s), the intended
audience, membership of the workshop organizing committee, and
intended arrangements for publication of the proceedings. Technical
management of the workshops will be autonomous but the fees and
registration will be handled by the main conference organizers.
Workshops are encouraged to seek sponsors from industrial contacts,
but this will in no way influence the selection of a proposal.

TUTORIALS: Send proposals of 1-2 pages for 90-minute or 3-hour
tutorials to the Tutorial Chair (
Include the proposed title, brief description of material, intended
audience, assumed background of attendees, and the name, affiliation,
contact information (email and phone) and brief biography of the
speaker(s). Tutorial overviews will be published in the main
conference proceedings.


Peter G. Harrison, Imperial College London, United Kingdom

Catalina Llado, Universitat de les Illes Balears, Spain

Martin Arlitt, HP Labs, USA and University of Calgary, Canada
Giuliano Casale, Imperial College London, United Kingdom

Tony Field, Imperial College London, United Kingdom

Y. Charlie Hu, Purdue University, USA
Samuel Kounev, KIT, Germany
Anirban Mahanti, NICTA, Australia

Urtzi Ayesta, BCAM and Ikerbasque, Spain

Jia Wang, AT&T Research, USA

Uli Harder, Imperial College London, United Kingdom

The 10th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA 2012)

Submitted by Javier Garcia Blas
January 15, 2012

Submitted by Javier Garcia Blas

Madrid, Spain, 10-13 July 2012

Important Dates
Papers due: January, 15, 2012 Camera ready: April, 15 2012
Notification: March, 15 2012 Conference dates: July, 10-13, 2012

ISPA-12 follows the traditions of previous successful ISPA
conferences, ISPA-03 (Aizu, Japan), ISPA-04 (Hong Kong), ISPA-05
(Nanjing, China), ISPA-06 (Sorrento, Italy), ISPA-07 (Niagara Falls,
Canada) and ISPA-08 (Sydney, Australia), ISPA-09 (Chengdu, China),
ISPA-10 (Taipei, Taiwan), ISPA-11 (Busan, Korea).

The objective of ISPA 2012 is to provide a forum for scientists and
engineers in academia and industry to exchange and discuss their
experiences, new ideas, research results, and applications about all
aspects of parallel and distributed computing and networking. It will
feature session presentations, workshops, tutorials, and keynote
speeches. ISPA-12 is sponsored by IEEE Technical Committee on Scalable
Computing (TCSC) and IEEE Computer Society.

Topics of interest
* Parallel and Distributed Algorithms, and Applications.
* High-performance scientific and engineering computing.
* Building block processors: FPGA, multicore, GPU, SoC
* Architectures and Virtualization.
* Middleware and tools.
* Network and pervasive computing.
* Performance simulations, measurement, and evaluations.
* Reliability, fault tolerance, and security.
* Database, data mining, and data management.
* Virtualization techniques, tools, and applications.
* Parallel/distributed system architectures.
* Tools/environments for parallel/distributed software development.
* Novel parallel programming paradigms.
* Code generation and optimization.
* Compilers for parallel computers
* Distributed systems and applications.
* Wireless networks, mobile, and pervasive computing.
* Energy management and power optimization.
* Green Computing and Energy-aware computing.
* Grid and cluster computing.
* Cloud systems and services.
* Programming models for Cloud services and applications.
* Internet computing and web services.
* Database applications, data mining, and data management.
* Data intensive applications and Internet-Of-Things.
* IoT and Ubiquitous computing: application scenarios.

Submissions should not exceed 8 pages in IEEE CS proceedings paper
format, including tables and figures. All paper submissions must
represent original and unpublished work. Submission of a paper should
be regarded as an undertaking that, should the paper be accepted, at
least one of the authors will register for the conference and present
the work. Submissions will be conducted electronically on the
conference website.

Journal publications
Extended versions of distinguished selected papers accepted and presented in
ISPA 2012, after further revisions, will be published in issues of following
indexed international journals:

– Cluster computing, Springer.
– The Computer Journal, Oxford.
– Int. Journal of Parallel Programming, Springer.
– Personal and Ubiquitous Computing, Springer.
– Computer & Electrical Engineering, Elsevier.

– Clouds for Business, Business for Clouds.
– International Workshop on Cross-Stratum Optimization for Cloud
Computing and Distributed Networked Applications.
– International Workshop on AstroParticles Physics Advanced Computing (APPAC).
– International Workshop on Multicore Cache Hierarchies: Design and
Programmability Issues.
– HAC 2012: International Workshop on Heterogeneus Architectures and Computing.
– International Workshop On The Growing Problems with Scalable,
Heterogeneous Infrastructures.
– International Workshop on Stream Computing Applications.

Best paper awards
The Program Committee of ISPA 2012 will give two best paper awards:
one NVIDIA Best Student Paper Award and one NVIDIA Best Paper
Award. Best Paper Awards will be given to the author(s) of a full
paper presented at the conference, selected by the Organizing
Committee. The Best Paper Award is a Tesla C2075 computing processor,
sponsored by NVIDIA.

Steering Chairs
Minyi Guo (Shanghai Jia Tong University, China)
Laurence T. Yang (St. Francis Xavier University, Canada)

General Chairs
David Abramson (Monash eScience and Grid Lab, Australia)
J. Daniel Garcia (University Carlos III of Madrid, Spain)
Thomas Ludwig (German Climate Computing Center and University of
Hamburg, Germany)

General Vice-Chairs
Felix Garcia (University Carlos III of Madrid, Spain)
James J. (Jong Hyuk) Park (Seoul National University of Science and
Technology, Korea)
Ruppa K. Thulasiram (University of Manitoba, Canada)

Program Chairs
Nelson Amaral (University of Alberta, Canada)
Jesus Carretero (University Carlos III of Madrid, Spain)
Mitsuhisa Sato (University of Tsukuba, Japan)

Workshop Chairs
Florin Isaila (University Carlos III of Madrid, Spain)
Avery Ching (Yahoo, USA)

Tutorial Chair
Robert Latham (Argonne National Labs, USA)

International Advisory Committee
Hamid R. Arabnia (The University of Georgia, USA)
Alok Choudhary (Northwestern University, USA)
Jack Dongarra (University of Tennessee, USA)
Ian Foster (Argonne National Laboratory and The University of Chicago, USA)
Hai Jin (Huazhong University of Science and Technology, China)
Eleni Karatza (Aristotle University of Thessaloniki, Greece)
Victor C.M. Leung (University of British Columbia, Canada)
Stephan Olariu (Old Dominion University, USA)
Yi Pan (Georgia State University, USA)
Stephen S. Yau (Arizona State University, USA)
Albert Y. Zomaya (The University of Sydney, Australia)

Program Vice-Chairs
Edson Borin (University of Campinas, Brasil)
Paolo Bellavista (University of Bologna, Italy)
Christian Engelmann (Oak Ridge National Laboratory, USA)
Akihiro Inokuchi (Osaka University, Japan)
Raffaele Montella (University of Napoli Parthenope, Italy)
Rainer Keller (HLRS, Germany)
Parimala Thulasiraman (University of Manitoba, Canada)

International Program Committee
Please visit the conference web site (

High-Performance Parallel and Distributed Computing (HPDC'12)

Submitted by Ioan Raicu
January 16, 2012

Submitted by Ioan Raicu

The 21st International ACM Symposium on
High-Performance Parallel and Distributed Computing (HPDC’12)

Delft University of Technology, Delft, the Netherlands
June 18-22, 2012

The ACM International Symposium on High-Performance Parallel and
Distributed Computing (HPDC) is the premier annual conference on the
design, the implementation, the evaluation, and the use of parallel
and distributed systems for high-end computing. HPDC’12 will take
place in Delft, the Netherlands, a historical, picturesque city that
is less than one hour away from Amsterdam-Schiphol airport. The
conference will be held on June 20-22 (Wednesday to Friday), with
affiliated workshops taking place on June 18-19 (Monday and Tuesday).

Abstracts: 16 January 2012
Papers: 23 January 2012 (No extensions!)

Dick Epema, Delft University of Technology, Delft, the Netherlands

Thilo Kielmann, Vrije Universiteit, Amsterdam, the Netherlands
Matei Ripeanu, The University of British Columbia, Vancouver, Canada

Alexandru Iosup, Delft University of Technology, Delft, the Netherlands

Submissions are welcomed on all forms of high-performance parallel and
distributed computing, including but not limited to clusters, clouds,
grids, utility computing, data-intensive computing, and massively
multicore systems. Submissions that explore solutions to estimate and
reduce the energy footprint of such systems are particularly
encouraged. All papers will be evaluated for their originality,
potential impact, correctness, quality of presentation, appropriate
presentation of related work, and relevance to the conference, with a
strong preference for rigorous results obtained in operational
parallel and distributed systems.

The topics of interest of the conference include, but are not limited
to, the following, in the context of high-performance parallel and
distributed computing:

– Systems, networks, and architectures for high-end computing
– Massively multicore systems
– Virtualization of machines, networks, and storage
– Programming languages and environments
– I/O, storage systems, and data management
– Resource management, energy and cost minimizations
– Performance modeling and analysis
– Fault tolerance, reliability, and availability
– Data-intensive computing
– Applications of parallel and distributed computing

Authors are invited to submit technical papers of at most 12 pages in
PDF format, including figures and references. Papers should be
formatted in the ACM Proceedings Style and submitted via the
conference web site. No changes to the margins, spacing, or font sizes
as specified by the style file are allowed. Accepted papers will
appear in the conference proceedings, and will be incorporated into
the ACM Digital Library. A limited number of papers will be accepted
as posters.

Papers must be self-contained and provide the technical substance
required for the program committee to evaluate their
contributions. Submitted papers must be original work that has not
appeared in and is not under consideration for another conference or a
journal. See the ACM Prior Publication Policy for more details.

Abstracts Due: 16 January 2012
Papers Due: 23 January 2012 (No extensions!)
Reviews Released to Authors: 8 March 2012
Author Rebuttals Due: 12 March 2012
Author Notifications: 19 March 2012
Final Papers Due: 16 April 2012
Conference Dates: 18-22 June 2012

17th International Conference on Architectural Support for Programming Languages and Operating Systems

Submitted by Tim Harris
March 3 to March 7, 2012

Submitted by Tim Harris

London, UK, March 3-7, 2012

Registration is now open for ASPLOS 2012. The early-reg deadline is
January 23rd, but please do register as soon as possible (i) to help
you get the best rates at nearby hotels, (ii) to avoid expensive
last-minute air fares, and (iii) to allow time for a visa application,
if needed.

The Monday-Wednesday conference programme is online, along with
details of the workshops and tutorials on the Saturday and Sunday:

Details of travel grants are at:

There are still several ways to get involved with the conference,
workshops, and tutorials:

* Provocative Ideas session submissions are due January 5th, 2012

* We are holding a First ASPLOS Doctoral Workshop, just before the
main conference. Submissions are due January 5th, 2012

* Tutorial:

Power Management of Multicore Systems: Challenges, Approaches, and
Recent Developments (Sunday March 4th, before the main conference)

* Workshops:

CCPC: Compiling Complete Programs into Circuits

EXADAPT: Workshop on Adaptive Self-Tuning Computing Systems for the
Exaflop Era

EXERT: Exascale Evaluation and Research Techniques Workshop

GPGPU-5: Workshop on General Purpose Processing on Graphics
Processing Units

RESoLVE: Runtime Environments, Systems, Layering and
Virtualized Environments

WoDET: Workshop on Determinism and Correctness in Parallel

Please check links from the ASPLOS workshops page for details of
which workshops still have open calls for papers: