Call for Papers: ISLPED 2013, Beijing, China

Submitted by Yuan Xie
September 4 to September 6, 2013

Submitted by Yuan Xie

Beijing, China
Sept. 4 – Sept. 6, 2013


The International Symposium on Low Power Electronics and Design
(ISLPED) is the premier forum for presentation of recent advances in
all aspects of low power design and technologies, ranging from process
and circuit technologies, simulation and synthesis tools, to system
level design and optimization. Specific topics include, but are not
limited to, the following two main areas, each with three sub-areas:
1.1. Technologies and Digital Circuits : Emerging logic/memory
technologies and applications; Low power device and interconnect
design; Low power low leakage circuits; Memory circuits; 3-D
technologies; Cooling technologies; Battery technologies;
Variation-tolerant design; Temperature-aware and reliable design.
1.2. Logic and Microarchitecture Design: Processor core design; Cache
and register file design; Memory Architectures; Logic and RTL design;
Arithmetic and signal processing circuits; Encryption technologies;
Asynchronous design.
1.3. Analog, MEMS, Mixed Signal and Imaging Electronics: RF circuits;
Wireless; MEMS circuits; AD/DA Converters; I/O circuits; Mixed signal
circuits; Imaging circuits; Circuits to support emerging technologies
and platforms; DC-DC converters.
2.1. CAD & Design Tools: Energy estimation and optimization tools
that operate at the physical, circuit/gate level, RT level, behavioral
level, and algorithmic levels; Links to other metrics: variability,
reliability, temperature.
2.2. System Design and Methodologies: Microprocessor, DSP and
embedded systems design; FPGA and ASIC designs; System-level power-
and thermal-aware design; System-level reliability- and
variability-aware design; Systems for Emerging applications
2.3. Software Design and Optimization: Power- and thermal-aware
software design, scheduling, and management; Application-level
optimizations; Wireless and sensor networks; Software for emerging

Submissions on new topics: emerging technologies,
architectures/platforms, and applications are particularly encouraged.


Abstract registration: March 8, 2013;
Full paper: March 15, 2013.

Submission Instructions:

Submissions should be full-length papers of up to 6 pages
(double-column, IEEE Transactions/Conference format, available at,
including all illustrations, tables, references and an abstract of no more than
100 words. Papers exceeding the six-page limit will not be reviewed. Submission
must be anonymous: papers identifying the authors and/or with explicit
references to their prior work will be automatically rejected. Electronic
submission in pdf format only via the web is required. More information on
electronic submission to ISLPED’13 can be found at

Program Co-Chairs:
Yuan Xie, Penn State/AMD Research
Tanay Karnik, Intel Labs

General Co-Chairs:
Pai Chou UC Irvine/NTHU
Ru Huang Peking University