NSF Solicitation 14-516: Exploiting Parallelism and Scalability (XPS)

Submitted by Hong Jiang

Submitted by Hong Jiang
Dear members of the SIGARCH community,
I’d like to bring to your attention the recently announced
NSF solicitation, 14-516,
for the crosscutting CISE program called Exploiting Parallelism and
Scalability (XPS):


Hong Jiang
Program Director, CCF/CISE
National Science Foundation

Call For Papers: Wild and Crazy Ideas (WACI) Session at ASPLOS 2014

Submitted by Niti Madan
March 1 to March 5, 2014

Submitted by Niti Madan
Keeping with the decade-long ASPLOS tradition of holding
“Wild and Crazy Ideas” sessions, ASPLOS 2014 is looking for
forward looking, visionary, inspiring, far out and just plain
amazing ideas for its next WACI session. What we are aiming
for is a session full of creativity presented in an exciting way.
In case you have been to prior WACI sessions and noted comedy
aspects to the presentations, please note that comedy is completely
optional and is not part of the selection criteria.

We do not have a prescribed list of topics. Anything directly or
indirectly related to computing systems is appropriate. If you
are unsure whether a topic is appropriate, please get in touch
with the WACI organizers via the email address below.

Submission instructions. You can submit either a 2-page abstract
or a 6-minute video/narrated slide deck. Please email a file or a
link to asplos2014.ideas@gmail.com. The deadline for submissions
is January 17.

Luis Ceze (University of Washington)
Karin Strauss (Microsoft Research)
Emery Berger (University of Massachusetts)
Mike Swift (University of Wisconsin)

Call for Papers: Workshop on Approximate Computing Across the System Stack (WACAS) 2014

Submitted by Niti Madan
March 2, 2014

Submitted by Niti Madan
Workshop on Approximate Computing Across the System Stack (WACAS) 2014
Co-located with ASPLOS 2014 – March 2, 2014 Salt Lake City, Utah, USA

With transistor scaling becoming less effective at improving
computer system performance and energy efficiency, we urgently
need options that provide a path forward for the IT industry.
Trading off accuracy for better performance and energy efficiency
is an attractive option for many important and resource-hungry
applications, including image and video processing, computer
vision, machine learning, simulations, big data analytics,
embedded systems, etc. For that reason, approximate computing
is quickly becoming a hot-topic with active research in computer
architecture, programming languages, operating systems and
user-facing areas such as ubiquitous computing and HCI.

Making approximate computing successful requires cooperation
among all layers of the stack, from algorithms to programming
languages to OSes to architecture to circuits, as well as system
components like storage and networks.
This workshop aims to bring together an interdisciplinary group
of researchers to present and discuss thoughts and ideas on how
to effectively exploit approximate computing.

The organizers are aiming for a mix of invited talks, debate,
panels and peer-reviewed papers.
Peer-reviewed papers will not be published in a proceedings, so
submitting to WACAS will not preclude future publication opportunities.
Topics include but are not limited to the following:

Hardware support for approximate computing
Programming languages and compiler support for approximate computing
Tools for writing, debugging, and testing approximate programs
Modeling and understanding approximate computing opportunities and systems
Applications amenable to approximation
Reflections on past work on approximate computing
Position papers on approximate computing, potential, how it would fail,
what we need to succeed, etc.

Prospective authors of research papers should aim for 6 pages including
references. Position papers and short notes should aim for 2 pages.

Important Dates

Paper submission: January 17, 2014
Author notification: February 10, 2014
Camera-ready submission: February 20, 2014
Workshop: Sunday, March 2, 2014

Program committee:

Luis Ceze, University of Washington
Hadi Esmaeilzadeh, Georgia Tech
Dan Grossman, University of Washington
Rakesh Kumar, UIUC
Mark Oskin, University of Washington
Ben Ransford, University of Washington
Adrian Sampson, University of Washington

Contact the wacas14@cs.washington.edu with questions.

Book Announcement: On-Chip Photonic Interconnects: A Computer Architect's Perspective

Submitted by David Schlangen

Submitted by David Schlangen
Announcing the latest title in Morgan & Claypools series
on Computer Architecture:

On-Chip Photonic Interconnects: A Computer Architect’s Perspective
Christopher J. Nitta, Matthew K. Farrens, and Venkatesh Akella
University of California, Davis
Synthesis Lectures on Computer Architecture
Paperback: 9781627052115 / $40.00 / £24.99
eBook ISBN: 9781627052122
October 2013, 111 pages

As the number of cores on a chip continues to climb, architects will need
to address both bandwidth and power consumption issues related to the
interconnection network. Electrical interconnects are not likely to scale
well to a large number of processors for energy efficiency reasons, and
the problem is compounded by the fact that there is a fixed total power
budget for a die, dictated by the amount of heat that can be dissipated
without special (and expensive) cooling and packaging techniques. Thus,
there is a need to seek alternatives to electrical signaling for on-chip
interconnection applications. Photonics, which has a fundamentally
different mechanism of signal propagation, offers the potential to not
only overcome the drawbacks of electrical signaling, but also enable the
architect to build energy efficient, scalable systems. The purpose of
this book is to introduce computer architects to the possibilities and
challenges of working with photons and designing on-chip photonic
interconnection networks.

Table of Contents: List of Figures / List of Tables / List of Acronyms /
Acknowledgments / Introduction / Photonic Interconnect Basics / Link
Construction / On-Chip Photonic Networks / Challenges / Other
Developments / Summary and Conclusion / Bibliography / Authors’

Series: Synthesis Lectures on Computer Architecture
Series Editor: Mark D. Hill, University of Wisconsin, Madison

Call for Papers: IEEE Micro Special Issue on Big Data

Submitted by Boris Grot
January 8, 2014

Submitted by Boris Grot
Call for Papers: IEEE Micro Special Issue on Big Data
Guest Editors: Babak Falsafi (EPFL) and Boris Grot (University of Edinburgh)

Submissions due: Jan 8, 2014
Author notification: March 5, 2014
Publication date: July­/Aug 2014

Big data is transforming our lives, but it is also placing an unprecedented
burden on our compute infrastructure. As data expansion rates outpace Moore’s
law and supply voltage scaling grinds to a halt, the IT industry is being
challenged in its ability to effectively store, process, and serve the growing
volumes of data. Delivering on the premise of big data in the post­-Dennard
era calls for specialization and tight integration across the system stack,
with the aim of maximizing energy efficiency, performance scalability,
resilience, and security. This IEEE Micro special issue seeks original papers
on a range of topics related to big data computing.

Areas of interest include, but are not limited to:
– Processor, memory systems, storage, and network architectures for big data
– Integrated systems for big data: blades, racks, and datacenters
– Custom accelerators for the big data domain
– Big data systems and workloads in the wild: case studies and bottleneck
– Software support for big data processing: programming languages, operating
systems, runtime environments
– Energy efficiency in big data systems through vertical integration,
specialization, and approximation
– Emerging compute, storage, and communication technologies for big data
– Architectural support for security in the context of big data

Submission procedure:

Log onto IEEE CS Manuscript Central (https://mc.manuscriptcentral.com/micro-cs)
and submit your manuscript. Please direct questions to the IEEE Micro magazine
assistant (micro-ma@computer.org). For the manuscript submission, acceptable
file formats include Microsoft Word and PDF. Manuscripts should not exceed
5,000 words including references, with each average-size figure counting as 150
words toward this limit. Please include all figures and tables, as well as a
cover page with author contact information (name, address, phone, and e­mail)
and a 200­-word abstract. Submitted manuscripts must not have been previously
published or currently submitted for publication elsewhere, and all
manuscripts must be cleared for publication. All previously published papers
must have at least 30% new content compared to any conference (or other)
publication. Accepted articles will be edited for structure, style, clarity,
and readability. For more information, please visit the IEEE Micro Author
Center at http://www2.computer.org/portal/web/peerreviewmagazines/acmicro.

Call for Participation: ADAPT 2014 @ HiPEAC 2014

Submitted by Grigori Fursin
January 22, 2014

Submitted by Grigori Fursin
ADAPT: 4th Workshop on Adaptive Self-tuning Computing Systems
22 January 2014, Vienna, Austria
(co-located with HiPEAC 2014)

Special focus on experimental reproducibility (see panel below)


* Keynote: Towards Resource Management
in Parallel Architectures “Under the Hood”
Per Stenstrom (Chalmers University of Technology, Sweden)

* Panel on reproducible research methodologies
and new publication models. Participants:

– Jack Davidson (University of Virginia /
Co-Chair of ACM’s Publication Board, USA)
– Lieven Eeckhout
(Ghent University / Intel ExaScience Lab, Belgium)
– Jesper Larsson Traff, Sascha Hunold
(Vienna University of Technology, Austria)
– Anton Lokhmotov (ARM, UK)
– Grigori Fursin (INRIA, France)
– Alex K.Jones, Daniel Mosse, Bruce Childers
(University of Pittsburgh, USA)

* Best paper award sponsored by Nvidia

* Early registration deadline: 23 December 2013:
Make sure to tick the box for the ADAPT workshop

List of accepted papers (9 out of 19):

1) “Language support for the construction of high performance
code generators”, Georg Ofenbeck, Tiark Rompf, Alen Stojanov,
Martin Odersky and Markus Puschel

2) “ASAFESSS: A Scheduler-Driven Adaptive Framework for Extreme
Scale Software Stacks”, Tom St. John, Benoit Meister,
Andres Marquez, Joseph Manzano, Guang Gao and Xiaoming Li

3) “A LLVM Extension for the Generation of Low Overhead Run-Time
Program Specializer”, Victor Lomuller and Henri-Pierre Charles

4) “A Scalable Fusable Dynamic Multicore Architecture”,
Behnam Robatmili and Aaron Smith

5) “Autonomous Fault Detection in Self-Healing Systems: Comparing
Hidden Markov Models and Artificial Neural Networks (reproducible)”,
Chris Schneider, Adam Barker and Simon Dobson

6) “A Self-tuning Scientific Framework using Model-Driven
Engineering for Heterogeneous Execution Platforms”,
Alecio Binotto, Leonardo Tizzei and Renato Cerqueira

7) “Roofline-aware DVFS for GPUs (reproducible)”,
Cedric Nugteren, Henk Corporaal and Gert-Jan van den Braak

8) “On the advantage of time-varying diversity of workload
on functionally asymmetric multi-core”, Alexandre Aminot,
Alain Chateigner, Yves Lhuillier and Henri-Pierre Charles

9) “HYDA: A HYbrid Dependence Analysis for the adaptive optimisation
of OpenCL kernels”, Christos Margiolas and Michael F.P. O’ Boyle

==== Program Chairs/organisers: ====

* Christophe Dubach (University of Edinburgh, UK)
* Grigori Fursin (INRIA Saclay, France)

==== Program Committee: ====

* Erik Altman (IBM TJ Watson, USA)
* Bruce Childers (University of Pittsburgh, USA)
* Koen De Bosschere (Ghent University, Belgium)
* Marisa Gil (UPC, Spain)
* Mary Hall (University of Utah, USA)
* Timothy Jones (University of Cambridge, UK)
* Anton Lokmotov (ARM, UK)
* Chi-Keung Luk (Intel, USA)
* Tipp Moseley (Google, USA)
* Toshio Nakatani (IBM, Japan)
* Lasse Natvig (NTNU, Norway)
* David Padua (UIUC, USA)
* Aaron Smith (Microsoft Research, USA)
* Juergen Teich (University of Erlangen-Nuremberg, Germany)
* Vittorio Zaccaria (Politecnico di Milano, Italy)

Call for Papers: REPRODUCE 2014

Submitted by Grigori Fursin
February 15, 2014 at 09:00

Submitted by Grigori Fursin
REPRODUCE: Workshop on Reproducible Research Methodologies
February 15, 2014, Orlando, Florida, USA
(co-located with HPCA 2014)

Computer science and engineering research increasingly rely on
numerous methods to explore research breakthroughs, including
empirical and statistical analysis, modeling, and simulation of
complex computer systems. These ad hoc methods are utilized due
to a variety of factors including cost of designing prototypes,
minimal access to state-of-the-art fabrication plants, problem
complexity and size, and return on investment. However, lack of
a common experimental methodology, and lack of simple and
unified mechanisms, tools and repositories to preserve and
exchange the whole experimental setup (including all past
research artifacts) makes it excessively challenging or even
impossible to accurately reproduce experimental results for
evaluation and future advancement.

This workshop is an interdisciplinary forum for academic,
governmental, and industrial researchers, promoters,
practitioners and developers to discuss ideas, experience,
trustable and reproducible research methodologies, practical
techniques, tools and repositories. Detailed topics of interest
include but are not limited to:

* Techniques for experimental reproducibility
* Fidelity validation of experiments and tools
* Reproducible benchmarking methodologies
* Scientific method for computing experiments
* Techniques to effectively leverage emulation
* Scalable HPC computing in experimentation
* Metrics quantifying performance vs. fidelity
* Reproducible and extensible methodologies
* Data-mining, crowdsourcing analysis methods
* Methods of dissemination of results
* Nomenclature and metadata onthology
* Tool, benchmark, experiment repositories
* Visualization and analysis techniques
* Reproducible simulation environments
* Experimental documentation methods
* Techniques to preserve/share experiments
* Methods to effectively analyze experiments
* Extracting metadata from experiments
* Methods for protecting intellectual property
* Education strategies for reproducible science

Submissions are 2-page extended abstracts for ongoing research,
wild and crazy ideas, position statements, demonstration of
tools for reproducible experiments, etc. Submissions should be
made via EasyChair at

Submission Deadline: January 8, 2014
Notification of Acceptance: January 23, 2014
Final Manuscripts Due: January 30, 2014
Workshop Date: February 15, 2014

Authors may be invited to submit to an IEEE Transactions on
Emerging Topics in Computing (TETC) Special Issue on
Reproducible Research Methodologies.

Alex Jones, akjones@pitt.edu
University of Pittsburgh, Pittsburgh, PA, USA

Grigori Fursin, grigori.fursin@inria.fr
INRIA, Saclay, France

Daniel Mosse, mosse@cs.pitt.edu
University of Pittsburgh, Pittsburgh, PA, USA

Bruce Childers, childers@cs.pitt.edu
University of Pittsburgh, Pittsburgh, PA, USA

Call for Papers: Seventh Workshop on General Purpose Processing Using GPUs

Submitted by Tristan Vanderbruggen
March 1, 2014

Submitted by Tristan Vanderbruggen
The goal of this workshop is to provide a forum to discuss new and
emerging general-purpose purpose programming environments and
platforms, as well as evaluate applications that have been able to
harness the horsepower provided by these platforms.
This year’s work is particularly interested on new heterogeneous GPU platforms.

GPGPU 7 is co-located with APLOS 14 and takes place March 1st, 2014 in
Salt Lake City, Utah, USA.


Papers are being sought on many aspects of GPUs, including (but not limited to):
– GPU applications
– GPU compilation
– GPU programming environments
– GPU power/efficiency
– GPU architectures
– GPU benchmarking/measurements
– Multi-GPU systems
– Heterogeneous GPU platforms

Important dates

Paper submission: December 20, 2013
Author notification: January 24, 2014
Final paper: TBA
Workshop date: March 1st, 2014

Workshop Organizers

John Cavazos, University of Delaware – Newark, DE
David Kaeli, Northeastern University – Boston, MA

Program Committee

Mani Azimi – Intel
Chris Batten – Cornell
David Black-Schaffer – Uppsala U.
Ramon Canal – UPC
Gregory Diamos – NVIDIA
Rodrigo Dominguez – Qualcomm
Magnus Ekman – Samsung
Byunghyun Jang – U. Mississippi
Lee Howes – Qualcomm
Paul Kelly – Imperial College
Mikel Lujan – NVIDIA
Simon McIntosh-Smith – U. of Bristol
Richard Membarth – Saarland University
Avi Mendelsohn – Technion
Duane Merrill – NVIDIA
Perhaad Mistry – AMD
Dimitris Nikolopoulos – Queens U.
Chris Rossbach – Microsoft
Norm Rubin – NVIDIA
Dana Schaa – AMD
Gunar Schirner – Northeastern
Huiyang Zhou – NC State
Dongping Zhang – AMD

Call for Papers: WoDet 2014 (Workshop on Determinism and Correctness in Parallel Programming)

Submitted by Joseph Devietti
January 10, 2014

Submitted by Joseph Devietti
Fifth Workshop on Determinism and Correctness in Parallel Programming
Salt Lake City, Utah, Sunday, March 2 2014
Co-located with ASPLOS 2014


Submission deadline: Friday, January 10 2014 at 11:59pm US Eastern Time
Notification: Sunday, February 9 2014


Simplifying parallel programming and making parallel programs execute correctly
are important goals. Support for programmability, correctness and reliability,
such as support for determinism and failure tolerance, has moved us toward these
goals. We have seen tremendous progress, but deciding what support to provide
for which properties remains an active research area with many open questions:
What are the performance and programmability trade-offs for providing a
particular property? What is the right balance between support for finding or
fixing bugs and preventing them with more restrictive programming models? How
should we handle programs that violate safety properties for performance or
expressivity? How can we accommodate heterogeneous parallel computers? What is
the role of each layer of the system stack? These questions are increasingly
urgent as more computing goes parallel, from sensors to data centers.

The Workshop on Determinism and Correctness in Parallel Programming (WoDet) is
an inclusive, across-the-stack forum to discuss the role of a wide range of
correctness properties in parallel and concurrent programming. While determinism
is an important theme, the scope of the workshop includes other correctness
properties for parallel programs and systems. The workshop will be a full day
event with invited talks and technical sessions for short peer-reviewed papers
discussing ideas, positions, or preliminary research results.


In addition to answers to the questions above, topics of interest include:

* Language extensions for disciplined parallelism, e.g., determinism, structured
* Architecture, OS, runtime, compiler support for parallel program correctness
* Concurrent program debugging techniques
* New properties of parallel programs
* Limit studies and empirical studies of the cost of safety properties
* Studies of the applicability of correctness properties in parallel programs
and algorithms
* Techniques for avoiding/tolerating failures due to concurrency bugs
* Real-world experience with safe parallel programming models, systems, or tools


Authors are invited to submit original and unpublished work that exposes a new
problem, advocates a specific solution, or reports on actual experience. Papers
should be submitted using the standard two-column ACM SIG proceedings or SIG
alternate template, and are limited to 6 pages (including figures, tables and
references). Final papers will be made available to participants electronically
at the meeting, but to facilitate resubmission to more formal venues, no
archival proceedings will be published, and papers will not be sent to the ACM
Digital Library. Authors will be given the option of having their final paper
accessible from the workshop website.


Brandon Lucia, Microsoft Research
Joe Devietti, University of Pennsylvania


Eddie Aftandilian, Google
Joe Devietti, University of Pennsylvania
Jakob Eriksson, University of Illinois at Chicago
Shan Lu, University of Wisconsin-Madison
Brandon Lucia, Microsoft Research
Santosh Nagarakatte, Rutgers University
Mark Oskin, University of Washington
Michael Scott, University of Rochester
Serdar Taşiran, Koç University
Martin Vechev, ETH Zürich
Eran Yahav, Technion

Call for Tutorials: ASPLOS 2014, Deadline Extended

Submitted by Niti Madan
March 1 to March 2, 2014

Submitted by Niti Madan
Important Dates
Submission deadline: Thursday, December 12, 2013
Notification: Tuesday, December 17, 2013

Tutorial proposals are solicited for ASPLOS-2014,
Salt Lake City,Utah. Tutorials will be held on
March 1, 2014 (Sat) and March 2, 2014 (Sun).
Proposals for both half- and full-day
tutorials are solicited on any topic that is relevant to
the ASPLOS audience. Tutorials that focus on tools and
techniques that enable research across layers of the
computational stack are strongly encouraged.
In previous years, tutorials seeking to achieve any of
the following goals have been particularly successful:
Describe an important piece of research infrastructure
Educate the community on an emerging topic.

Submission Procedures
Proposals should provide the following information:
Presenter(s) and contact information.
Proposed duration (full day, half day).
1-2 paragraph abstract suitable for tutorial publicity.
1 paragraph biography per presenter suitable for tutorial
1-3 page description (for evaluation). This should include:
Tutorial scope and objectives,
Topics to be covered,
Target audience,
If the tutorial has been held previously, the location
(i.e., conference), date, and number of attendees.

Proposals should take the form of a PDF document, and be
submitted via e-mail to Ioana Baldini (ioana@us.ibm.com)
and Livio Soares(lsoares@us.ibm.com), with the subject
“ASPLOS 2014 Tutorial Proposal”. Submissions will be
acknowledged via e-mail.