Call for Papers: TRUST'14 @ PLDI'14

Submitted by Grigori Fursin
http://c-mind.org/events/trust2014
June 12, 2014 at 09:00

Submitted by Grigori Fursin
http://c-mind.org/events/trust2014
TRUST: 1st ACM SIGPLAN Workshop
on Reproducible Research Methodologies
and New Publication Models in Computer Engineering

June 12,2014, Edinburgh, UK
(co-located with PLDI 2014)

http://c-mind.org/events/trust2014

It becomes excessively challenging or even impossible to capture,
share and accurately reproduce experimental results in computer
engineering for fair and trustable evaluation and future
improvement. This is often due to ever rising complexity of the
design, analysis and optimization of computer systems, increasing
number of ad-hoc tools, interfaces and techniques, lack of
a common experimental methodology, and lack of simple and unified
mechanisms, tools and repositories to preserve and exchange
knowledge apart from numerous publications where reproducibility
is oaten not even considered. This SIGPLAN workshop is intended
to become an interdisciplinary forum for academic and industrial
researchers, practitioners and developers in computer engineering
to discuss challenges, ideas, experience, trustable and
reproducible research methodologies, practical techniques, tools
and repositories to:

* capture, preserve, formalize, systematize, exchange and improve
knowledge and experimental results including negative ones
* describe and catalog whole experimental setups with all related
material including algorithms, benchmarks, codelets, datasets,
tools, models and any other artifact
* validate and verify experimental results by the community
* develop common research interfaces for existing or new tools
* develop common experimental frameworks and repositories
* share rare hardware and computational resources for
experimental validation
* deal with variability and rising amount of experimental data
using statistical analysis, data mining, predictive modeling and
other techniques
* implement previously published experimental scenarios
(auto-tuning, run-time adaptation) using common infrastructure
* implement open access to publications and data (particularly
discussing intellectual property IP and legal issues)
* improve reviewing process
* enable interactive articles

==== Important Dates ====

* Abstract submission deadline: March 7, 2014 (AoE)
* Paper submission deadline: March 14, 2014 (AoE)
* Author notification: April 14, 2014
* Final paper version: May 2, 2014
* Workshop: June 12, 2014

==== Workshop organizers ====

* Grigori Fursin (INRIA, France)
* Bruce Childers, Alex K.Jones and Daniel Mosse
(University of Pittsburgh, USA)

==== Program Committee ====

* Jose Nelson Amaral (University of Alberta, Canada)
* Calin Cascaval (Qualcomm, USA)
* Jack Davidson (University of Virginia, USA)
* Evelyn Duesterwald (IBM, USA)
* Lieven Eeckhout (Ghent University, Belgium)
* Eric Eide (University of Utah, USA)
* Sebastian Fischmeister (University of Waterloo, Canada)
* Michael Gerndt (TU Munich, Germany)
* Christophe Guillon (STMicroelectronics, France)
* Shriram Krishnamurthi (Brown University, USA)
* Hugh Leather (University of Edinburgh, UK)
* Anton Lokhmotov (ARM, UK)
* Mikel Lujan (University of Manchester, UK)
* David Padua (University of Illinois at Urbana-Champaign, USA)
* Christoph Reichenbach
(Johann-Wolfgang Goethe Universitat Frankfurt, Germany)
* Arun Rodrigues (Sandia National Laboratories, USA)
* Reiji Suda (University of Tokyo, Japan)
* Sid Touati (INRIA, France)
* Jesper Larsson Traff (Vienna University of Technology, Austria)
* Petr Tuma (Charles University, Czech Republic)
* Jan Vitek (Purdue University, USA)
* Vladimir Voevodin (Moscow State University, Russia)
* Vittorio Zaccaria (Politecnico di Milano, Italy)
* Xiaoyun Zhu (VMware, USA)

==== Paper Submission Guidelines ====

We invite papers in three categories (please use these prefixes
for your submission title):

* T1: Extended abstracts should be at most 3 pages long
(excluding bibliography). We welcome preliminary and exploratory
work, presentation of related tools and repositories
in development, experience reports, and wild & crazy ideas.
* T2: Full papers should be at most 6 pages long (excluding
bibliography). Papers in this category are expected to have
relatively mature content.
* T3: Papers validating and sharing past research on design and
optimization of computer systems published in relevant
conferences. These papers should be at most 6 pages long
(excluding bibliography).

Submissions should be in PDF formatted with double
column/single-spacing using 10pt fonts and printable on US letter
or A4 sized paper. All papers will be peer-reviewed. Accepted
papers can be published online on the conference website that
will not prevent later publication of extended papers.
We currently arrange proceedings to be published in the ACM
Digital Library.

Easychair submission website:
https://www.easychair.org/conferences/?conf=trust20140

==== Some related projects and initiatives ====

* Conference Artifact Evaluation
http://cs.brown.edu/~sk/Memos/Conference-Artifact-Evaluation/

* HiPEAC thematic session on making computer engineering a science:
http://www.hipeac.net/thematic-session/making-computer-engineering-science

* ADAPT panel on reproducible research methodologies and new
publication models (January 2014):
http://adapt-workshop.org/program.htm

* Collective Mind technology for collaborative, systematic and
reproducible computer engineering:
http://c-mind.org

* cTuning technology to crowdsource auto-tuning
and combine with machine learning (2006-2011):
http://cTuning.org

* OCCAM project for reproducible computer architecture simulation:
http://www.occamportal.org

* Evaluate project:
http://evaluate.inf.usi.ch

* Artifact evaluation at OOSPLA’13:
http://splashcon.org/2013/cfp/665

* Artifact evaluation at PLDI’14:
http://pldi14-aec.cs.brown.edu

* CARE tool from STMicroelectronics
(Comprehensive Archiver for Reproducible Execution)
http://reproducible.io

==== Sponsors ====

* ACM SIGPLAN, http://sigplan.org

Call for Participation: 5th Non-Volatile Memories Workshop

Submitted by Steven Swanson
http://nvmw.ucsd.edu
March 9 to March 11, 2014

Submitted by Steven Swanson
http://nvmw.ucsd.edu
Call for Participation
5th Non-Volatile Memories Workshop
La Jolla, California USA
March 9-11, 2014

The 5th Annual Non-Volatile Memories Workshop (NVMW 2014)
provides a unique showcase for outstanding research on solid
state, non-volatile memories. It features a “vertically
integrated” program that includes includes presentations on
a wide range of topics spanning devices, data encoding,
systems architecture, and applications:

* Big data applications for NVMs
* Flash-based SSD optimization
* Power management in NVMs
* Operating system optimizations
* SSD wear management
* Persistent objects
* Novel NVM array architectures
* Error coding for NVMs

The workshop program will include around 30 speakers from
top universities, industrial research labs, and around the
world.

Workshop information is available here http://nvmw.ucsd.edu/

Early registration ends February 28th.
Travel grant applications are due February 12th.

Platinum Sponsors
==============================
National Science Foundation
HGST
NetApp
Micron

Gold Sponsors
==============================
Microsoft Research
Rambus
Toshiba
PMC Sierra
Western Digital
LSI
SK Hynix memory solutions

Organizers
==============================
Steven Swanson, UCSD CSE
Paul Siegel, UCSD ECE/CMRR

Program Committee
==============================

Al Borchers, Google
Alexander Driskill-Smith, Samsung
Alexandros Dimakis, UT Austin
Andrew Jiang, Texas A & M
Bipin Rajendran, IIT, Bombay
Bongki Moon, Seoul National University
Brian Kurkoski, JAIST
Chaitan Baru, SDSC
Chao Tian, AT&T Labs – Research
Christophe Chevallier, Rambus
Dalia Malkhi, Microsoft Research
Douglas Santry, NetApp
Edwin Kan, Cornell University
Eitan Yaakobi, Caltech
Ethan Miller, UC Santa Cruz
Hemant Thapar, UCSD
Hironori Uchikawa, Toshiba
Ken Lee, Qualcomm
Maya Gokhale, LLNL
Nitin Agrawal, NEC
Rick Coulson, Intel
Robert Calderbank, Duke
Shruti Patil, Univ. of Minnesota
Sudhanva Gurumurthi, AMD Research and Univ. of Virginia
Xinmiao Zhang, SanDisk
Yingquan Wu, Tidal Systems
Yitzhak (Tsahi) Birk, Technion
Yuval Cassuto, Technion
Zvonimir Bandic, HGST

Call for Papers: 30th International Conference on Massive Storage Systems and Technology (MSST 2014)

Submitted by Thomas Schwarz SJ
http://storageconference.org
June 2 to June 6, 2014

Submitted by Thomas Schwarz SJ
http://storageconference.org
Abstracts Deadline March 4, 2014
Paper Submission: March 9, 2014
Notifications: April 7, 2014
Final papers due: May 2, 2014
Research Track: June 5 – 6, 2014
Papers published in: IEEE Xplore

The 30th International Conference on Massive Storage systems and
Technologies (MSST 2014) will have IEEE as a technical co-sponsor
and will be held at Santa Clara University in the midst of Silicon Valley.
The conference offers a full week dedicated to storage technology. As
on previous occasions, the conference will include a two-day research
track of peer-reviewed papers on the design, analysis, and
implementation of and experience with storage systems. Published
papers will be indexed by IEEE and appear in IEEE Xplore.

We encourage the submission of research papers on the
implementation, design, and analysis of file and storage systems.
Specific areas of interest for the MSST
2014 Research Track include (but are not limited to):

Performance modeling and analysis of storage systems
Experiences with real-world systems and data storage challenges
Management of new and upcoming storage technologies
Cloud storage systems and global-scale storage
Exascale storage architecture and design
Evaluation of networked storage architectures
Data protection and recovery
Data archiving
Storage in virtualized environments
Storage systems modeling and evaluation
Techniques for building extremely scalable and distributed
storage systems
Parallel and distributed file systems
Scalable metadata management
Storage security, privacy, and provenance
Long-term data preservation and management
Disk and Flash based cold storage systems
File systems for cold storage
File systems for shingled magnetic recording hard disk
drives
File systems for solid state disk drives
New solid state disk APIs: Object storage, key value store,
memory mapping …
Phase change memory based storage class memory
devices and systems

As is traditional, MSST will have short and full papers. Short
papers are to be 4 – 6 pages in length, whereas full papers are
8 – 14 pages in length. Accepted full papers will be presented in a
30 minute session, short papers will be presented in a poster session
with short (7 minutes) presentations. All papers will be published
by IEEE Xplore and indexed by IEEE.

Details about the submission process and rules as well as the conference
organization will be published at the conference website:
http://storageconference.org.
The submission process will be managed by easychair at
https://www.easychair.org/conferences/?conf=msst2014.

Call for Papers: ICCS/Alchemy – Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems

Submitted by Loïc Cudennec
https://sites.google.com/site/alchemyworkshop/
January 20, 2014

Submitted by Loïc Cudennec
https://sites.google.com/site/alchemyworkshop/
This is the last call for papers for the ICCS/Alchemy workshop on
manycore processors.
The submission deadline is now set to January 20 (firm deadline).

ALCHEMY Workshop
Architecture, Languages, Compilation and Hardware support for Emerging
ManYcore systems

Held in conjunction with the International Conference on Computational
Science (ICCS 2014)
Cairns, Australia
June 10-12, 2014

http://sites.google.com/site/alchemyworkshop

Call for papers
Massively parallel processors are made of hundreds to thousands cores,
integrated memories and a dedicated network on a single chip.
They provide high parallel performance while drastically reducing power
consumption. Manycore architectures are therefore expected to enter both HPC
(cloud servers, simulation, big data..) and embedded computing (autonomous
vehicles, signal processing, cellular networks..).
In the first session of this workshop, held together with ICCS 2013, we
presented several academic and industrial works that contribute to the
efficient programmability of manycores. This year, we also focus
on preliminary user feedback to see if today available manycore processors
meet their expectations.

Topics (not limited to)
* Programming languages and paradigms targeting massively parallel
architectures
* Advanced compilers for programming languages targeting massively
parallel architectures
* Advanced architecture support for massive parallelism management
* Advanced architecture support for enhanced communication for
CMP/manycores
* Shared memory, data consistency models and protocols
* New OS, or dedicated OS for massively parallel application
* Runtime generation for parallel programing on manycores
* User feedback on existing manycore architectures
(experiments with Adapteva Epiphany, ARM big.LITTLE, Intel Phi,
Kalray MPPA, ST STHorm, Tilera Gx, TSAR..etc)

Important dates (subject to modifications)
Full paper submission: January 20, 2014 (firm)
Notification of acceptance: February 20, 2014
Camera-ready papers: March 5, 2014
Author registration (ICCS): February 15 – March 10, 2014
Participant early registration (ICCS): February 15 – April 25, 2014
ALCHEMY session: June 10 – 12, 2014

Check out the ICCS important dates.

Submission
Papers should be formatted using the ICCS rules.
Please, note that papers must not exceed ten pages in length, when
typeset using the Procedia format.

After the conference, selected papers will be invited for a special
issue of the Journal of Computational Science.

Program Committee
Frédéric BONIOL, ONERA, France
Aparna CHANDRAMOWLISHWARAN, MIT, USA
Loïc CUDENNEC, CEA, LIST, France
Stephan DIESTELHORST, ARM Cambridge, UK
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
José FLICH CARDO, Universidad Politécnica de Valencia, Spain
Guy GOGNIAT, Université de Bretagne Sud, France
Bernard GOOSSENS, Université de Perpignan, France
Vincent GRAMOLI, NICTA / University of Sydney, Australia
Jorn W. JANNECK, Lund University, Sweden
Michihiro KOIBUCHI, National Institute of Informatics, Japan
Stéphane LOUISE, CEA, LIST, France
Vania MARANGOZOVA-MARTIN, Université Joseph-Fourier Grenoble, France
Marco MATTAVELLI, EPFL, Switzerland
Onur MUTLU, Carnegie Mellon University, USA
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Erwan PIRIOU, CEA, LIST, France
Antoniu POP, University of Manchester, UK
Erwan RAFFIN, CAPS entreprise, France
Mickaël RAULET, IETR / INSA de Rennes, France
Etienne RIVIERE, University of Neuchâtel, Switzerland
Thomas ROPARS, EPFL, Switzerland
Osamu TATEBE, AIST / University of Tsukuba, Japan
Philippe THIERRY, Intel Corporation, France

Organizers
Loïc CUDENNEC, CEA, LIST, France
Stéphane LOUISE, CEA, LIST, France

http://www.cea.fr/english_portal

Call for Papers: SPAA 2014

Submitted by Jeremy Fineman
http://www.spaa-conference.org
January 22, 2014

Submitted by Jeremy Fineman
http://www.spaa-conference.org
26th ACM Symposium on
Parallelism in Algorithms and Architectures (SPAA 2014)
June 23-25, 2014 Prague, Czech Republic
http://www.spaa-conference.org

This year, the submissions format differs from recent years.
There will also be a rebuttal period.

Important Dates:

Submission deadlines:
– Abstract: January 22, 11:59pm EST
– Full versions: January 25, 11:59pm EST

Rebuttal period: March 12-16
Notification: March 31

Camera-ready: April 30

Contributed papers are sought in all areas of parallel algorithms and
architectures, encompassing any computation system that can perform multiple
operations or tasks simultaneously. Topics of interest include, but are not
limited to:

– parallel and distributed algorithms
– parallel and distributed data structures
– green computing & power-efficient architectures
– management of massive data sets
– parallel complexity theory
– parallel and distributed architectures
– multi-core architectures
– instruction level parallelism and VLSI
– compilers and tools for concurrent programming
– supercomputing architecture and computing
– transactional memory hardware and software
– the internet and the world wide web
– game theory and collaborative learning
– routing and information dissemination
– resource management and awareness
– peer-to-peer systems
– mobile, ad-hoc, and sensor networks
– robustness, self-stabilization, and security
– synergy of parallelism in algorithms, programming, and architecture

Conference presentations will have two formats:

Regular presentations will be allotted a 25-minute talk and up to 10
pages in the proceedings. This format is intended for contributions
reporting original research, submitted exclusively to this conference.

Brief announcements will be allotted a 10-minute talk and a 2-page
abstract in the proceedings. This format is a forum for brief
communications, which may be published later in other conferences.

Every regular paper is eligible for the best paper award. The program
committee may decline to make this award or may split the award among
multiple papers.

Submission:

Authors of contributed papers are encouraged to submit their manuscript
electronically. To submit electronically, visit http://www.spaa-conference.org
for instructions. This is the preferred method of submission. Authors unable
to submit electronically should contact the program chair Peter Sanders at
sanders@kit.edu to receive instructions on how to proceed.

Submissions for regular presentations should include an introduction
understandable to a nonspecialist including motivation and previous work, and
a technical exposition directed to a specialist. A submission should not
exceed 10 double-column pages in 9-point font, including figures, tables, and
references. More details may be supplied in a clearly marked appendix to
be read at the discretion of the program committee. A submission for brief
announcements should be no longer than two double-column pages in 9-point
font.

Rebuttal Period:

There will be a rebuttal period in which the authors can point out
misunderstandings or comment on critical questions that PC members may have.
The rebuttal period will take place on March 12-16.

Program Committee:

Susanne Albers, Technische Universität München, Germany
Gianfranco Bilardi, Padua University, Italy
Phillip Gibbons, Intel Labs Pittsburg, USA
Martin Hoefer, MPI Informatics Saarbrücken, Germany
Dariusz Kowalski, University of Liverpool, UK
Fredrik Manne, University of Bergen, Norway
Ulrich Meyer, Goethe University Frankfurt/M., Germany
Friedhelm Meyer auf der Heide, University of Paderborn, Germany
Seth Pettie, University of Michigan, USA
Vijaya Ramachandran, University of Texas at Austin, USA
Christian Scheideler, University of Paderborn, Germany
Oded Schwartz, UC Berkeley, USA
Sandeep Sen, IIT Delhi, India
Jiri Sgall, Charles University in Prague, Czech Republic
Nodari Sitchinava, University of Hawaii, Manoa, USA
Alexander Tiskin, University of Warwick, UK
Jesper Träff, Vienna University of Technology, Austria
Phiilippas Tsigas, Chalmers University Gothenburg, Sweden
Roger Wattenhofer, ETH Zürich, Switzerland

Conference Committee:

Program Chair
Peter Sanders, Karlsruhe Institute of Technology, Germany

General Chair
Guy Blelloch, Carnegie Mellon University

Secretary
Christian Scheideler, University of Paderborn

Treasurer
David Bunde, Knox College

Publicity Chair
Jeremy Fineman, Georgetown University

Local Arrangements Chair
Petr Kolman, Charles University in Prague, Czech Republic

Call for Papers: The 9th IEEE International Conference on Networking, Architecture, and Storage (NAS 2014)

Submitted by Jianhui Yue
http://www.nas-conference.org/
August 6 to August 8, 2014

Submitted by Jianhui Yue
http://www.nas-conference.org/
The 9th IEEE International Conference on Networking, Architecture,
and Storage (NAS 2014) will be held from August 6 − 8, 2014 in
Tianjin, China. It will serve as an international forum to bring
together researchers and practitioners from academia and industry
to discuss cutting-edge research on networking, high-performance
computer architecture, and parallel and distributed data storage
technologies.

Topics (Topics of interest include but are not limited to the list as follow)
– Virtual and overlay networks
– Network applications and services
– Ad hoc and sensor networks
– Networks and protocols
– Network architectures
– Processor architectures
– Cache and memory systems
– Parallel computer architectures
– Impact of technology on architecture
– Network information theory & network coding
– Network modeling and measurement
– Power and energy efficient architectures and techniques
– Storage management
– Storage performance and scalability
– File systems, object-based storage and block storage
– Energy-aware storage
– Architecture and applications of solid state disks
– Cloud storage
– Storage visualization
– HW/SW co-designs&trade-offs

Important Dates
– Deadline for Paper Submission: March 21st, 2014
– Notification of Paper Acceptance: May 19th, 2014
– Camera-ready Paper and Author Registration: June 9th, 2014

Submission
NAS 2014 invites authors to submit original and unpublished work.
All accepted papers will be included in the IEEE digital library
and indexed by EI. (IEEE sponsorship is pending approval.)

Call for Participation: ASPLOS 2014

Submitted by Niti Madan
https://www.cs.utah.edu/asplos14/
March 1 to March 5, 2014

Submitted by Niti Madan
https://www.cs.utah.edu/asplos14/
19th International Conference on
Architectural Support for Programming Languages and Operating
Systems being held in Salt Lake City, UT, USA March 1-5, 2014

Please note the following:
Deadline for Wild and Crazy Ideas (WACI) Submissions : Jan 17th
Student Travel Grant Application Deadline : Feb 2nd
http://matt.might.net/events/asplos/2014/travel/
Early Registration Deadline: Feb 10th
https://www.regonline.com/Register/Checkin.aspx?EventID=1366338
Hotel Reservation Deadline: Jan 30th
https://www.cs.utah.edu/asplos14/hotel.html
Technical Program https://www.cs.utah.edu/asplos14/program.html
Co-located Events Program
https://www.cs.utah.edu/asplos14/colocated_events.html
Upcoming Deadlines for ASPLOS Workshop Submissions:
WACAS — Approximate Computing — Jan 17th
W-MOS — Overprovisioned Systems — Feb 3rd

ASPLOS is the premier forum for multidisciplinary systems
research spanning computer architecture and hardware, programming
languages and compilers, and operating systems and networking. The
program covers cross-cutting research spanning mobile systems to
data centers, targeting diverse goals such as performance, energy
efficiency, resiliency, and security.

The conference program (March 3rd-5th) features:

– 49 technical papers
– Two keynotes
– Brad Calder, Microsoft
– Jeff Gehlhaar, Qualcomm
– A debate
– Resolved: Specialized architectures,
languages, and system software should
largely supplant general-purpose alternatives
within the next decade
Moderator: David Wood, University of Wisconsin-Madison
– A Wild and Crazy Ideas (WACI) session featuring
– WACInote: RF-powered computing and communication
Josh Smith, University of Washington
– A poster session and lightning talk session for all
accepted papers

ASPLOS Co-Located Events:

Saturday March 1st 2014
– ACM SIGPLAN/SIGOPS International Conference on
Virtual Execution Environments (VEE)
– Workshop on Managing Overprovisioned Systems (W-MOS)
– 7th Workshop on General Purpose Processing Using GPUs (GPGPU-7)
– 4th Workshop on Big Data Benchmarks, Performance Optimization,
and Emerging Hardware (BPOE-4)
– Tutorial: Towards Database Virtualization for Database as
a Service
– Tutorial: Pin Binary Instrumentation Tutorial
– Tutorial: Accelerating Big Data Processing with Hadoop
and MemCached on Datacenters with Modern Networking and
Storage Architecture
– Tutorial: Analyzing Analytics for Parallelism

Sunday March 2nd 2014
– ACM SIGPLAN/SIGOPS International Conference on
Virtual Execution Environments (VEE)
– 5th Workshop on Determinism and Correctness for
Parallel Programs (WODET)
– 9th Workshop on Transactional Computing (TRANSACT)
– 1st Workshop on Approximate Computing Across the
System Stack (WACAS)
– Tutorial: System Analytics in the Cloud
– Tutorial: Concord: Homogeneous Programming for
Heterogeneous Platforms
– Tutorial: Rigorous and Practical Server Design Evaluation
– Tutorial: Machine Learning on Big Data
– Tutorial: Multi2Sim – A Compilation and Simulation Framework
for Heterogeneous Computing

Wild and Crazy Ideas (WACI) Call for Submissions:

Keeping with the decade-long ASPLOS tradition of holding
Wild and Crazy Ideas sessions, ASPLOS 2014 is looking for
forward looking, visionary, inspiring, far out and just
plain amazing ideas for its WACI session.
What we are aiming for is a session full of creativity
presented in an exciting way. We do not have a prescribed
list of topics. Anything directly or indirectly related
to computing systems is appropriate. If you are unsure
whether a topic is appropriate, please get in touch with
the WACI organizers via the email address below.

This is a great opportunity to show the community new
directions, new ideas, new ways of thinking, new perspectives,
etc. So why not use some time over the next week to brainstorm
with your colleagues and friends and submit a great idea?
Please submit!

Submission instructions:
You can submit either a 2-page abstract or a 6-minute video
or narrated slide deck.
Please email a file or a link to asplos2014.ideas@gmail.com
Submission Deadline: January 17

Call for Participation: CGO 2014

Submitted by Martha Kim
http://cgo.org/cgo2014
February 15 to February 19, 2014

Submitted by Martha Kim
http://cgo.org/cgo2014
Call for Participation
International Symposium on Code Generation and Optimization (CGO) 2014
February 15-19, 2014
Orlando, Florida

The International Symposium on Code Generation and Optimization (CGO)
provides a premier venue to bring together researchers and
practitioners working at the interface of hardware and software on a
wide range of optimization and code generation techniques and related
issues. The conferences spans the spectrum from purely static to fully
dynamic approaches, including techniques ranging from pure
software-based methods to architectural features and support.

The program will feature 28 technical papers and three keynote speeches:

21st Century Computer Architecture
Mark D. Hill
Computer Sciences Department, University of Wisconsin-Madison

Are scripting languages ready for mobile computing?
Calin Cascaval
Qualcomm

Heterogeneous computing – what does it mean for compiler research?
Norm Rubin
NVIDIA

Important links:

Registration, including at discounted rates through January 17th:
https://www.regonline.com/Register/Checkin.aspx?EventID=1144861

Student travel support is available:
http://cgo.org/cgo2014/attend-cgo/travel-support-for-eligible-students/

For discounted hotel rates:
http://cgo.org/cgo2014/attend-cgo/hoteltravel-information/