Call for Travel Grant Applications – ISCA 2015 (Deadline: May 1, 2015)

Submitted by Lisa Wu
http://www.isca2015.org
June 13 to June 17, 2015

Submitted by Lisa Wu
http://www.isca2015.org

Call for Travel Grant Applications – ISCA-42
The 42nd Annual International Symposium on Computer Architecture
Portland, OR, USA
June 13-17, 2015
 

TRAVEL GRANT DEADLINE: May 1, 2015
With generous support from the U.S. National Science Foundation, ACM SIGARCH,
IEEE TC on Computer Architecture, and Oracle, ISCA-42 will offer travel grants
for students to defray a portion of their travel cost. The size and number of
these grants will vary depending on funding availability, the number of student
applicants, and their respective priority. Grant awards will be made before the
early registration deadline; expenses will be reimbursed after the conference;
grant recipients will be asked to submit original receipts to verify their
expenditures.

SIGARCH members can also apply for travel grants to support child-care or
companion assistance (SIGARCH Grants and Support Programs). Please mention
this explicitly in your travel grant application along with other pertinent
details.

While we encourage all in need of a travel grant to apply, the selection process
will give higher priority to students with greater involvement in the conference
(presenter, co-author). Grants made available by NSF will use selection criteria
that consider broader impact. We strongly encourage applications from students
that belong to under-represented groups. Also, certain funds will be available
to ACM SIGARCH student members and IEEECS members only. We highly encourage
students to join SIGARCH and TCCA to be given higher priority. SIGARCH offers
an online membership for $2.

APPLICATION INSTRUCTIONS:
– Applicants must fill out the Travel Grant Application Form before the
deadline, May 1, 2015.
– Student applicants also need to ask their direct thesis advisor to send an
e-mail to the Student Travel Award Chair (jtuck@ncsu.edu) with the subject
line “ISCA Student Travel Status Confirmation for “, stating that you are a full-time
student pursuing an MS/Ph.D. or an undergraduate researcher in the areas
covered by ISCA. The advisor is also welcome to comment on the potential broader
impact of making an award to you, e.g., if you belong to an underrepresented
group, or if the candidate is unable to attend without a substantial travel grant.

ADDITIONAL NOTES:
– Please save all the original receipts. You need to mail them later.
– Funds can be applied to transportation and lodging between June 13 and
June 17, 2015.
– The confirmation email from their advisors must be received by the same
deadline. Your application is considered incomplete without it.
– Due to the large number of applications we expect to receive, we will NOT
solicit letters from your advisors. It is YOUR responsibility to ensure
that your advisor sends the email before the deadline. No exception will
be made for any reason.
– DEADLINE: Travel grant application form must be received by 11:59pm,
May 1, 2015.
– We will do our best to notify you about the status of your application by
May 18, 2015, which is before the conference early registration deadline.
Note that award decisions will be made based on funding availability. Note
also that some awards may be made only after the conference.
– Depending on the source of funding, some awardees will be required to email
the travel grant chair a short essay describing their ISCA experience or
their favorite paper.
 

Call for Papers: HPCA 2016

Submitted by Jose F. Martinez
September 11, 2015

Submitted by Jose F. Martinez
The 22nd IEEE International Symposium
on High Performance Computer Architecture (HPCA)

Barcelona, Spain
 

The IEEE International Symposium on High Performance Computer
Architecture (HPCA) provides a high-quality forum for scientists
and engineers to present their latest research findings in this
rapidly changing field. Authors are invited to submit papers on
all aspects of high-performance computer architecture. Topics of
interest include, but are not limited to:

– Processor, cache, and memory architectures
– Parallel computer architectures
– Multicore architectures
– Impact of technology on architecture
– Power-efficient architectures and techniques
– Dependable/secure architectures
– High-performance I/O systems
– Embedded and reconfigurable architectures
– Interconnect and network interface architectures
– Architectures for cloud-based HPC and data centers
– Innovative hardware/software trade-offs
– Impact of compilers and system software on architecture
– Performance modeling and evaluation
– Architectures for emerging technology and applications

Authors should submit an abstract by Friday, September 4, 2015,
5pm EST. They should submit the full version of the paper by
Friday, September 11, 2015, 5pm EST. No requests for extensions
will be granted. The full version should be a PDF file that
follows the submission guidelines that will be available at the
conference website. Papers should be submitted for double-blind
review. We anticipate selecting a Best Paper award. All papers
will be evaluated based on their novelty, fundamental insights,
experimental evaluation, and potential for long-term impact.

ORGANIZING COMMITTEE:
General Co-chairs:
Ramon Canal, U. Politècnica de Catalunya
Antonio González, U. Politècnica de Catalunya

Program Chair:
José Martínez, Cornell U.

Program Committee:

Tor Aamodt, U. of British Columbia
David Albonesi, Cornell U.
Rajeev Balasubramonian, U. of Utah
David Brooks, Harvard U.
Christopher Batten, Cornell U.

Brad Beckmann, AMD
Mainak Chaudhuri, IIT Kanpur
Reetuparna Das, U. of Michigan
Joe Devietti, U. of Pennsylvania
Natalie Enright Jerger, U. of Toronto

Hadi Esmaeilzadeh, Georgia Tech
José Flich, U. Politècnica de València
Boris Grot, U. of Edinburgh
Kim Hazelwood, Yahoo! Labs
James Hoe, Carnegie Mellon U.

Jaehyuk Huh, KAIST
Hillery Hunter, IBM Research
Wen-mei Hwu, U. of Illinois
Engin Ipek, U. of Rochester
Mary Jane Irwin, Penn State U.

Ulya Karpuzcu, U. of Minnesota
Stefanos Kaxiras, Uppsala U.
Jangwoo Kim, POSTECH
Martha Kim, Columbia U.
Nam Sung Kim, U. of Wisconsin

Christos Kozyrakis, Stanford U.
Hsien-Hsin Lee, TSMC
Mikko Lipasti, U. of Wisconsin
Scott Mahlke, U. of Michigan
Srilatha Manne, Cavium Networks

Debbie Marr, Intel
Jason Mars, U. of Michigan
Pablo Montesinos, Qualcomm
Trevor Mudge, U. of Michigan
Mike O’Connor, NVIDIA

Alex Ramirez, NVIDIA
José Renau, U.C. Santa Cruz
Daniel Sanchez, MIT
Karu Sankaralingam, U. of Wisconsin
Yanos Sazeides, U. of Cyprus

Dan Sorin, Duke U.
Per Stenström, Chalmers U.
Viji Srinivasan, IBM Research
Carole-Jean Wu, Arizona State U.
Jun Yang, U. of Pittsburgh

Call for Participation: ANCS 2015

Submitted by Eric Keller
http://www.ancsconf.org/
May 7 to May 8, 2015

Submitted by Eric Keller
http://www.ancsconf.org/

The 11th ACM/IEEE Symposium on
Architectures for Networking and Communications Systems (ANCS 2015)

co-Located with NSDI
Oakland, CA, USA
May 7-8, 2015

Venue:
Oakland Marriott City Center
1001 Broadway
Oakland, CA

Sponsored by:
ACM Special Interest Group on Computer Architecture (SIGARCH)
ACM Special Interest Group on Communications (SIGCOMM)
IEEE Computer Society Tech. Committee on Computer Architecture (TCCA)
USENIX is an in-cooperation sponsor of ANCS 2015

CONFERENCE OVERVIEW:
ANCS is the premier forum for presenting and discussing original research
that explores the relationship between the algorithms and architectures of
data communication networks and the hardware and software elements from which
these networks are built. This includes both experimental and theoretical
analysis. To recognize and foster the increasing importance of research into
the co-design of computer and network systems, the conference also places an
emphasis on systems issues arising from the interaction of computer and
network architectures.

IMPORTANT DATES:
Early registration: On/Before Apr 17, 2015
Conference date: May 7-8, 2015

HOTEL INFORMATION:
Group Discount Rate: $195 USD/night
Reservation method: See http://www.ancsconf.org/hotel-travel
Cut-off date: Apr 11, 2015

VISA INFORMATION:
The Association of Computing Machinery (ACM) can issue a visa support letter
for those ANCS attendees who need them. For visa support letters, please send
all requests to supportletters@acm.org with the following information:

– Name (as it appears on your passport) and mailing address
– The name of the conference: ACM/IEEE Symposium on Architectures for
Networking and Communications Systems (ANCS) 2015
– Include your registration confirmation number
– If you are the author of any papers accepted for the conference, please
provide the title.
– Include a fax number or email address of where we can send the letter

Those requesting a letter should allow up to one week to receive it, as requests
are handled in the order they are received.

Call for Papers: HiPEAC 2016

Submitted by Daniel A. Jiménez
http://www.hipeac.net/conference
June 1, 2015

Submitted by Daniel A. Jiménez
http://www.hipeac.net/conference

11th International Conference on High-Performance Embedded
Architectures and Compilers (HiPEAC 2016)

Prague, Czech Republic
January 18-20, 2016
 

SUBMISSION DEADLINE: June 1, 2015 (Submissions are accepted after
this deadline through the TACO review process)

Sponsored by HiPEAC Compilation & Architecture Seventh Framework
Programme.

The HiPEAC conference is the premier European forum for experts in computer
architecture, programming models, compilers and operating systems for
embedded and general-purpose systems. Associated workshops, tutorials,
special sessions, several large poster session and an industrial exhibition will
run in parallel with the conference. The three day event attracts over 500
delegates each year.

Paper selection is done by ACM TACO, the ACM Transactions on Architecture
And Code Optimization. Prospective authors submit their original papers to
ACM TACO at any time before the paper deadline of June 1, 2015 to benefit
from two rounds of reviews before the conference paper track cut-off date
which is November 15, 2015. Details of the new publication model called
ACM TACO 2.0 are available on the conference web site: model:
https://www.hipeac.org/2016/prague/call-for-papers/

Topics of interest include, but are not limited to:
– Processor, memory, and storage systems architecture
– Parallel, multi-core and heterogeneous systems
– Interconnection networks
– Architectural support for programming productivity
– Power, performance and implementation efficient designs
– Reliability and real-time support in processors, compilers and run-time
systems
– Application-specific processors, accelerators and reconfigurable processors
– Architecture and programming environments for GPU-based computing
– Simulation and methodology
– Architectural and run-time support for programming languages
– Programming models, frameworks and environments for exploiting parallelism
– Compiler techniques
– Feedback-directed optimization
– Program characterization and analysis techniques
– Dynamic compilation, adaptive execution, and continuous profiling/optimization
– Binary translation/optimization
– Code size/memory footprint optimizations

ORGANIZERS:
General Chair:
– Martin Palkovič, IT4Innovations, VŠB-Technical University of Ostrava

Program Chair:
– David Kaeli, Northeastern University

Workshops & Tutorials Chairs:
– Diana Göhringer, Ruhr-Universität Bochum
– Pedro Trancoso, University of Cyprus

Publicity Chairs:
– Daniel A. Jiménez, Texas A&M University
– Dimitrios Soudris, National Technical University of Athens
– Tom Vander Aa, Intel ExaScience Lab, Imec
– Bernhard Egger, Seoul National University

Exhibition Chair:
– Branislav Jansík, IT4Innovations, VŠB-Technical University of Ostrava

Poster Chair:
– Koen De Bosschere, Ghent University

Sponsor Chair:
– Albert Cohen, INRIA
– Bart Kienhuis, Leiden University

Industrial Session Chair:
– Daniel Gracia Pérez, Thales

Finance Chair:
– Vicky Wandels, Ghent University

Web and Registration Chair:
– Eneko Illarramendi, Ghent University

Local Arrangements Committee:
– Martin Palkovič, IT4Innovations, VŠB-Technical University of Ostrava
– Vít Vondrák, IT4Innovations, VŠB-Technical University of Ostrava
– Karina Pešatová, IT4Innovations, VŠB-Technical University of Ostrava
 

Call for Participation: ISCA 2015

Submitted by Lisa Wu
http://www.isca2015.org
June 13 to June 17, 2015

Submitted by Lisa Wu
http://www.isca2015.org

The 42nd Annual International Symposium on Computer Architecture (ISCA-42)
Portland, OR, USA
June 13-17, 2015
 

The International Symposium on Computer Architecture (ISCA) is the premier
forum for new ideas and experimental results in computer architecture. ISCA
is sponsored by ACM SIGARCH and IEEE Computer Society TCCA.

IMPORTANT DATES:
– Early registration deadline: May 18th, 2015 (for workshops, tutorials, and
the main conference)
– Hotel reservation deadline: May 16th, 2015 or until any individual hotel is
sold out, whichever comes first.
– Travel grant application deadline: May 1st, 2015

CONFERENCE DETAILS:
– Workshops and tutorials: June 13 – 14
– Main conference: June 15 – 17
Note that the main conference will run a FULL 3 days this year! Please make
your travel plans to accommodate the extended conference time.

FCRC registration:
https://www.regonline.com/Register/Checkin.aspx?EventID=1692718

Hotel Reservation:
ACM has blocked sleeping rooms at five hotels all within a short walk of the
Oregon Convention Center with rates ranging from a very affordable $110/night
to $169/night for the higher end properties. You and your delegates may find
more information online: http://fcrc.acm.org/travel.cfm

ORGANIZING COMMITTEE:
General Chair: Debbie Marr, Intel


Program Chair
: David Albonesi, Cornell University


Steering Committee:
– Mark Horowitz, Stanford University
– David Kaeli, Northeastern University
– Steve Keckler, Nvidia, University of Texas Austin
– Avi Mendelson, Technion
– Margaret Martonosi, Princeton University
– Josep Torrellas, University of Illinois at Urbana-Champaign
– David A. Wood, University of Wisconsin-Madison
– Pen-Chung Yew, University of Minnesota
– Antonia Zhai, University of Minnesota
 

Call for Papers: FPL 2015

Submitted by Kubilay Atasu
http://www.fpl2015.org/
September 2 to September 4, 2015

Submitted by Kubilay Atasu
http://www.fpl2015.org/

25th International Conference on Field Programmable Logic and
Applications (FPL2015)

The Royal Institution
London, UK
September 2-4, 2015
 

Please note the following extended deadlines:
– Abstract submission deadline: 27 March 2015 -> 3 April 2015
– Full paper submission deadline: 3 April 2015 -> 10 April 2015
 

The International Conference on Field Programmable Logic and Applications (FPL)
is the first and the largest conference covering the rapidly growing area of
field-programmable logic. During the past 25 years, many of the advances in
reconfigurable system architectures, applications, processors, electronic
design automation (EDA) methods and tools have been first published in the
proceedings of the FPL conference series. The objective of FPL is to bring
together researchers and practitioners from both academia and industry from
around the world to share their insight into the frontiers of field-
programmable logic and its applications.

The 25th FPL Conference will take place at the Royal Institution, London, UK,
during September 2 – 4, 2015. Tutorials and associated workshops are offered on
August 31, September 1 and 4. A new angle of FPL 2015 is power efficient and
self-aware FPGA accelerators and heterogeneous computing platforms for High
Performance Computing, embedded systems and cyber physical systems. Highlights
of FPL 2015 will include keynotes from academia and industry.
FPL 2015 will offer the following 5 conference tracks:

1) Architectures And Technology
2) Applications And Benchmarks
3) Design Methods And Tools
4) Self-aware And Adaptive Systems
5) Surveys, Trends And Education

Additional details and submission Instructions on: www.fpl2015.org
 

Call for Posters and Student Research Competition: SC'15

Submitted by Manish Parashar
https://submissions.supercomputing.org/
November 15 to November 20, 2015

Submitted by Manish Parashar
https://submissions.supercomputing.org/

SC’15
Austin, TX, USA
November 15-20, 2015
 

IMPORTANT DATES:
Submissions Open: April 01, 2015
Poster Submission Deadline: July 31, 2015
Notification Sent: September 8, 2015

SC’15 is soliciting submissions for posters that display cutting-edge
research and work in progress in high performance computing, storage,
networking and analysis. Posters provide an excellent opportunity for
short presentations and informal discussions with conference attendees.

Posters will be prominently displayed for the duration of the conference,
giving presenters a chance to showcase their latest results and
innovations. The presented posters will be digitally archived and made
publicly available after the conference. A Best Poster Award will be
presented based on quality of research work and quality of poster
presentation.

ACM Student Research Competition (SRC): SC’15 will also host the ACM
Student Research Competition (SRC). This competition will feature posters
from undergraduate and graduate students showcasing original student
research. An SRC poster may be authored by exactly one graduate student
or up to 2 undergraduate students (optionally with the advisor). Student
authors must be active ACM members. The ACM SRC pre-selection will happen
during the poster reception and selected poster presenters will be given
the opportunity to present their work in short talks on Wednesday. The
ACM SRC committee will select a set of winners based on their poster
content and presentation style. ACM¹s SRC program covers expenses up to
$500 for all students invited to the SRC.

Embedded Multimedia Content: This year, we are encouraging authors to
explore the integration of remotely hosted multimedia elements accessible
through embedded QR codes into the poster. The goal of the embedded
multimedia elements should be to enhance the presentation of research in
the poster. Such elements may include a video narration of the poster by
the author, links to results, movies, graphics, datasets, codes, etc.
Note that extended versions of the poster or related publications will
not be considered as acceptable multimedia elements in this context. The
elements will be expected to be accessible using QR readers on smart
phones and tablets (such as the reader included in the SC mobile app)
during the conference while the poster is displayed. While the use of
multimedia is not mandatory, creative multimedia integrations will be
considered while evaluating posters for the Best Poster Award. Note that
the conference will not provide services or infrastructure for hosting
the embedded content.

SUBMISSION GUIDELINES:
As in past years, SC’15 is soliciting two different types of posters:
(1) Regular Posters and (2) ACM Student Research Competition Posters.
Submissions for either type of poster must include:
(1) A 150 word abstract,
(2) A draft of the poster, and
(3) An up to 800 word extended abstract/summary (including references) in
the SC’15 technical paper format.
There are separate submission forms for the two different types of
posters. A poster may only be submitted as one type. Posters are expected
to be a single page of A0 paper size in portrait mode (841 x 1189mm/33.1
x 46.8 in).

All posters can be submitted in up to two of the following categories:
Algorithms; Applications; Architectures and Networks; Clouds and
Distributed Computing; Data Analytics, Visualization and Storage;
Performance; Programming Systems; State-of-the-Practice; System Software;
and Education.

For submission details, see the sample submission forms at the login page
of the submission website: https://submissions.supercomputing.org.

ORGANIZERS:
SC’15 Posters Chair
– Manish Parashar (Rutgers University)

SC’15 Posters Vice Co-Chairs
– Dorian Arnold (University of New Mexico)
– Michela Becchi (University of Missouri – Columbia)

Email Contact and Questions: posters@info.supercomputing.org
 

Call for Papers: Workshop on Resource-Efficient Cloud Computing

Submitted by Christina Delimitrou
http://web.stanford.edu/~cdel/rec2
June 13, 2015 at 09:00

Submitted by Christina Delimitrou
http://web.stanford.edu/~cdel/rec2

Workshop on Resource-Efficient Cloud Computing
Co-located with ISCA 2015
Half Day Workshop: Saturday, June 13, 2015 (morning)
 

With large-scale datacenters increasing in size and number, the challenge to
improve their efficiency is becoming more pressing. Despite their prevalence,
these systems remain greatly underutilized, even when techniques such as
virtualization and containers are used. Given that building new datacenters or
expanding existing systems is not a scalable approach to increase the compute
capabilities of cloud systems moving forwards, system architects and system
designers must focus on operating and managing these systems more efficiently.
For this reason, over the past few years, resource-efficient cloud computing
has attracted increased attention both from academia and industry. Effectively
improving the resource-efficiency of large-scale systems requires cooperation
among all layers of the system stack, from hardware to OSes, as well as
scheduling and resource management systems and application design. The goal of
the workshop is to bring together cloud computing researchers from academia and
industry, underline the most pressing challenges in large-scale system design,
and encourage new ways of improving the efficiency of these systems.

CALL FOR PAPERS:
We are aiming for a mix of invited talks by experts in academia and industry,
panels and peer-reviewed papers. Peer-reviewed papers will not be published in
workshop proceedings, so submitting to the workshop will not preclude future
publication opportunities. We especially welcome early work and position papers
on future research directions.

Topics include but are not limited to:
– Hardware support for resource partitioning and isolation
– Scheduling, resource management and cloud provisioning systems
– Software techniques for enforcing resource isolation
– Runtimes that improve utilization and application QoS
– Scalable cluster management frameworks
– Bare-metal OSes for cloud applications
– Resource-efficient application design
– Datacenter monitoring and troubleshooting
– Implications of resource-efficiency to datacenter fault-tolerance
– Real-world measurements and analysis of cloud inefficiencies

SUBMISSION GUIDELINES:
Papers should be 4-6 pages long (8.5″ x 11″ pages), including figures and
tables, but not including references. You may include any number of pages for
references. Papers should be formatted in 2 columns, using 10-point type on
12-point leading, in a text block of 6.5″ x 9″. Figures and tables must be
large enough to be legible when printed on 8.5″ x 11″ paper. Papers must be
submitted for single-blind review, i.e., you can include the authors’ names.
Please submit your papers over email to the workshop organizers by the
submission deadline.

For any questions, please contact Christina Delimitrou at cdel@stanford.edu

IMPORTANT DATES:
Paper Submission: April 10 2015 23:59 PST
Author Notification: April 24, 2015
Final Paper Submission: May 24, 2015
Workshop: June 13, 2015

ORGANIZERS:
Christina Delimitrou, Stanford University (cdel@stanford.edu)
Prof. Christos Kozyrakis, Stanford University (kozyraki@stanford.edu)
Prof. Lingjia Tang, University of Michigan (lingjia@eecs.umich.edu)
Prof. Jason Mars, University of Michigan (profmars@eecs.umich.edu)
 

Call for Papers: IEEE Micro Special Issue on Near Data Processing

Submitted by jayvant anantpur
http://www2.computer.org/portal/web/peerreviewmagazines/acmicro

Submitted by jayvant anantpur
https://sites.google.com/site/ieeemicro/call-for-papers/near-data-processing

IEEE Micro Special Issue on Near Data Processing

GUEST CO-EDITORS:
Rajeev Balasubramonian, University of Utah
Boris Grot, University of Edinburgh

Initial submissions due: July 3, 2015
Publication date: Jan/Feb 2016

Systems executing big-data workloads commonly move large volumes of data
through the memory and storage hierarchy, only to perform a modest amount of
computation on each data element. As a result, performance and energy-
efficiency of these systems is increasingly limited by the high cost of data
movement. To alleviate this bottleneck and leverage the high bandwidths within
memory and storage devices, there is a growing interest in abstractions and
technologies to move computation closer to the data. This notion of Near-Data
Processing (NDP) extends earlier research on Processing-in-Memory by
leveraging new technologies (e.g., 3D stacking) and emerging workloads (e.g.,
in-memory databases).

This IEEE Micro special issue seeks papers on a range of topics related to NDP,
including:
– Memory, storage and interconnect architectures for NDP
– Near-Data accelerators and computation offload models
– Trade-offs and limitations in moving computation to the data
– Programming models, runtimes, and tools in support of NDP
– Case studies and evaluation of NDP systems and workloads
– Cross-cutting issues in the context of NDP systems, including security,
reliability, and code portability

SUBMISSION PROCEDURE:
Log onto IEEE CS Manuscript Central (https://mc.manuscriptcentral.com/micro-
cs) and submit your manuscript. Please direct questions to the IEEE Micro
magazine assistant (micro­-ma@computer.org) regarding the submission site. For
the manuscript submission, acceptable file formats include Microsoft Word and
PDF. Manuscripts should not exceed 5,000 words including references, with each
average­-size figure counting as 250 words toward this limit. Please include
all figures and tables, as well as a cover page with author contact
information (name, postal address, phone, fax, and e­mail address) and a
200­-word abstract. Submitted manuscripts must not have been previously
published or currently submitted for publication elsewhere, and all
manuscripts must be cleared for publication. All previously published papers
must have at least 30% new content compared to any conference (or other)
publication. Accepted articles will be edited for structure, style, clarity,
and readability. For more information, please visit the IEEE Micro Author
Center (http://www2.computer.org/portal/web/peerreviewmagazines/acmicro).

IMPORTANT DATES:
Initial submissions due: July 3, 2015
Initial notifications: August 31, 2015
Revised papers due: September 25, 2015
Final notifications: November 5, 2015
Final versions due: November 15, 2015
Publication date: Jan/Feb 2016

Questions: Please contact Guest co-editors Rajeev Balasubramonian
(rajeev@cs.utah.edu) and Boris Grot (boris.grot@ed.ac.uk), or Editor-in-Chief
Lieven Eeckhout (lieven.eeckhout@ugent.be).

Call for Papers: IEEE Micro General Interest 2015

Submitted by jayvant anantpur
http://www2.computer.org/portal/web/peerreviewmagazines/acmicro

Submitted by jayvant anantpur
https://sites.google.com/site/ieeemicro/call-for-papers/2015-cfp—general-interest

IEEE Micro General Interest 2015

IEEE Micro seeks general-interest submissions for publication in upcoming
2015 issues. The submissions should present the design, performance, or
application of microcomputer and microprocessor systems. Summaries of work
in progress and descriptions of recently completed work are most welcome,
as are tutorials and position statements.

IEEE Micro is a bimonthly magazine of the IEEE Computer Society that
reaches an international audience of computer designers, system
integrators, and users. IEEE Micro publishes 6 to 8-page papers that are
slightly less technical and less quantitative than top-conference and
archival journal papers, while being insightful, slightly more
qualitative, with a high tutorial value, and up to date with current
trends. IEEE Micro attracts a broad readership among both academics and
practitioners who want to keep up with new results and trends in the field
of computer architecture.

Areas of interest include, but are not limited to:
– Processor, memory, and storage systems architecture
– Parallel and multicore systems
– Data-center scale computing
– Architectures for handheld and mobile devices
– Application-specific, reconfigurable, or embedded architectures
– Heterogeneous and accelerator-based architectures
– Neuromorphic computing architectures
– Architectures for security and virtualization
– Power and energy efficient architectures
– Interconnection networks
– Instruction, thread, and data-level parallelism
– Dependable architectures
– Architectural support for programming productivity
– Network processor and router architectures
– Architectures for emerging technologies and applications
– Effect of circuits and technology on architecture
– Architecture modeling and simulation methodology
– Performance evaluation and measurement of real systems
– Design of high-performance and low-power chips

SUBMISSION PROCEDURE:
Log onto IEEE CS Manuscript Central
(https://mc.manuscriptcentral.com/micro-cs) and submit your manuscript.
Please direct questions to the IEEE Micro magazine assistant
(micro-¬ma@computer.org) regarding the submission site. For the
manuscript submission, acceptable file formats include Microsoft Word and
PDF. Manuscripts should not exceed 5,000 words including references, with
each average¬size figure counting as 150 words toward this limit. Please
include all figures and tables, as well as a cover page with author
contact information (name, postal address, phone, fax, and e¬mail address)
and a 200¬-word abstract. Submitted manuscripts must not have been
previously published or currently submitted for publication elsewhere, and
all manuscripts must be cleared for publication. All previously published
papers must have at least 30% new content compared to any conference (or
other) publication. Accepted articles will be edited for structure, style,
clarity, and readability. For more information, please visit the IEEE
Micro Author Center
(http://www2.computer.org/portal/web/peerreviewmagazines/acmicro).
The submission site is continuously open. Papers of general interest
appear in upcoming issues as space allows, or are grouped in the Nov/Dec
2015 issue.

QUESTIONS?
Contact the Editor-in-Chief, Lieven Eeckhout, at lieven.eeckhout@ugent.be.