Call For Proposals: Workshops at ASPLOS 2016

Submitted by Changhee Jung

Submitted by Changhee Jung

21th International Conference on Architectural Support for
Programming Languages and Operating Systems (ASPLOS 2016)

Atlanta, GA, USA

Workshop proposals are solicited for ASPLOS 2016.
Workshops will be held on April 2, 2016 (Saturday) and April 3, 2016 (Sunday).

Proposals in the interplay between programming languages, computer
architecture, operating systems, and user interfaces to deal with power,
performance, resilience, and programmer productivity issues in emerging
areas such as datacenters and cloud computing, systems based on non-
volatile memory technologies, large scale data analysis, smart infrastructure,
and extreme scale computing are encouraged.

Please include in your proposal:
– Title of the workshop
– Organizers and their affiliations
– Sample call for papers
– Duration – Half-Day or Full Day
– Preferred Day – Saturday or Sunday
– If the workshop was previously held, the location (conference), date,
and number of attendees

Proposals should be submitted via e-mail to Tushar Krishna
( with the subject “ASPLOS2016 Workshop Proposal”. Submissions will be acknowledged via e-mail.

Feel free to contact Tushar Krishna if you have any questions about the
suitability of a workshop for ASPLOS or for any other related matters.

Submission Deadline: November 17, 2015
Notification: November 24, 2015

Call For Proposals: Tutorials at ASPLOS 2016

Submitted by Changhee Jung

Submitted by Changhee Jung

21th International Conference on Architectural Support for
Programming Languages and Operating Systems (ASPLOS 2016)

Atlanta, GA, USA

Tutorial proposals are solicited for ASPLOS 2016.
Tutorials will be held on April 2, 2016 (Saturday) and April 3, 2016 (Sunday).

Proposals for both half- and full-day tutorials are solicited on any topic that
is relevant to the ASPLOS audience. Tutorials that focus on tools and techniques
that enable research across layers of the computational stack are strongly

In previous years, tutorials seeking to achieve any of the following goals have
been particularly successful:
– Describe an important piece of research infrastructure.
– Educate the community on an emerging topic.

Proposals should provide the following information:
– Title
– Presenter(s) and contact information.
– Proposed duration (full day, half day).
– 1-2 paragraph abstract suitable for tutorial publicity.
– 1 paragraph biography per presenter suitable for tutorial publicity.
– 1-3 page description (for evaluation), which should include:
  o   Tutorial scope and objectives
  o   Topics to be covered
  o   Target audience
  o   Expected number of attendees
  o   If the tutorial has been held previously, the location (i.e., conference),
date, and number of attendees.

Proposals should be submitted via e-mail to Tushar Krishna
( with the subject “ASPLOS2016 Tutorial Proposal”.
Submissions will be acknowledged via e-mail.

Submission deadline: November 17, 2015
Notification: November 24, 2015

Call for Papers: ISCA 2016

Submitted by Boris Grot
November 23, 2015

Submitted by Boris Grot

International Symposium on Computer Architecture (ISCA)
Seoul, Korea
June 18-22 2016

The International Symposium on Computer Architecture is the premier forum for
new ideas and experimental results in computer architecture. The conference
specifically seeks particularly forward-looking and novel submissions. Papers
are solicited on a broad range of topics, including (but not limited to):

– Processor, memory, and storage systems architecture
– Parallel and multicore systems
– Data-center scale computing
– Architectures for handheld and mobile devices
– Application-specific, reconfigurable, or embedded architectures
– Accelerator-based architectures
– Architectures for security and virtualization
– Power and energy efficient architectures
– Interconnection networks
– Instruction, thread, and data-level parallelism
– Dependable architectures
– Architectural support for programming productivity
– Network processor and router architectures
– Architectures for emerging technologies and applications
– Effect of circuits and technology on architecture
– Architecture modeling and simulation methodology
– Performance evaluation and measurement of real systems

Abstract Deadline: November 16, 2015, 11:59:59PM EST
Final Paper Deadline: November 23, 2015, 11:59:59PM EST
Rebuttal Period: February 17-21, 2016
Author Notification: March 9, 2016

General Co-Chairs:
Sang Lyul Min, Seoul National University
Gabriel Loh, AMD Research

Program Chair:
Andre Seznec, INRIA


Submitted by Nicolas Gast
June 14 to June 18, 2016

Submitted by Nicolas Gast

Antibes Juan-les-Pins, France
June 14-18, 2016

Abstract submission: Nov 23, 2015
Paper submission: Nov 30, 2015
Paper notification: Feb 20, 2016
Conference: June 14-18, 2016

The joint ACM SIGMETRICS / IFIP Performance conference solicits papers on the
development and application of state-of-the-art, broadly applicable analytic,
simulation and measurement-based performance evaluation techniques. Of
particular interest is work that presents new performance evaluation methods or
that creatively applies previously developed methods to make predictions about,
or gain insights into key design trade-offs in, computer and networked systems.
The main conference will be held from June 15-17, 2016. There will be tutorials
and workshops on June 14 and June 18, 2016. Submission details will be
published shortly on this Web site. All accepted regular papers will include
oral (short or long time slot, single track) presentations. A limited number
of submitted papers will be accepted for a poster session.

The notion of performance is broadly construed, including considerations of
speed and scalability as well as reliability, availability, and manageability
of systems. We particularly encourage submissions including real world
empirical studies and focusing on implementation and experimental issues.

Papers should not exceed 12 pages double column including figures, tables,
and references in standard ACM format. In addition, a 2-page appendix is
permitted, where the appendix does not count towards the original 12 pages.
Papers must be submitted electronically in printable pdf form. All submissions
will be reviewed using a double-blind review process.

General Chairs:
Sara Alouf, Inria
Alain Jean-Marie, Inria

Program Chairs:
Nidhi Hegde, Bell Labs
Alexandre Proutière, KTH

Call for Papers: Int'l Symposium on Hardware Oriented Security and Trust

Submitted by Domenic Forte
May 3 to May 5, 2016

Submitted by Domenic Forte

IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

HOST highlights new results in the area of hardware and system security.

HOST 2016 invites original contributions related to the following topics.

– Hardware Trojan attacks and detection techniques
– Hardware-based security primitives (PUFs, RNGs)
– Side-channel attacks and protection
– Security, privacy, and trust protocols
– Metrics, policies, and standards related to hardware security
– Security of biomedical systems, e-health, and medicine
– Secure system-on-chip (SoC) architecture
– Hardware IP trust (watermarking, metering, trust verification)
– Trusted manufacturing including split manufacturing and 3D ICs
– Security analysis and protection of Internet of Things (IoT)
– Secure and efficient implementation of crypto algorithms
– Reverse engineering and hardware obfuscation
– Supply chain risks mitigation including counterfeit detection & avoidance
– Hardware tampering attacks and protection
– Hardware techniques that ensure software and/or system security

For students:
– Best paper award
– Best presentation award
– Travel grants for undergraduate and graduate students

The page limit is 6 double column IEEE with a minimum font size of 10 points.
Submissions must not identify the authors anywhere in the manuscript.

For the first time, students can participate in a hardware demo session. To do so,
please submit a 1-page proposal describing the demonstration on a hardware
platform. Send the proposal to Hardware Demo Chair ( by
March 5, 2016.

Submission of Abstract: November 1, 2015
Submission of Paper: November 8, 2015
Notification of Acceptance: January 31, 2016
Camera-ready Version: February 28, 2016
Hardware Demo Proposals: March 15, 2016

Facebook Page:

Technical Program: S. Bhunia, U. of Florida
General: W. H. Robinson, Vanderbilt U.

Call for Papers: Workshop on Negative Outcomes, Post-mortems, and Experiences

Submitted by Svilen Kanev
December 6, 2015

Submitted by Svilen Kanev

Workshop on Negative Outcomes, Post-mortems, and Experiences
in conjunction with MICRO’15
December 6, 2015
Waikiki, Hawaii, USA

Not all research projects end up with positive results. Sometimes ideas that
sound enticing at first run into unexpected complexity, high overheads, or turn
out simply infeasible. Such projects often end up in a proverbial researcher’s
drawer, and the community as a whole is not aware of dead-end or
hard-to-advance research directions. NOPE is a venue that encourages publishing
such results in all their “badness”.

Submission deadline: November 2, 2015

More details at

Call for Participation: IISWC 2015

Submitted by Jaewoong Sim
October 4 to October 6, 2015

Submitted by Jaewoong Sim

IEEE International Symposium on Workload Characterization
Atlanta, Georgia, USA
October 4-6, 2015

IISWC is the only symposium of its kind anywhere. If you are interested at all
with what computing workloads really look like today, IISWC is where you can
get answers.

Come join us in lovely midtown Atlanta on the Georgia Tech campus for 3-days of
learning, networking, and collaboration:


– David Brooks (Harvard University)
– Flavio Villanustre (VP Technology, LexisNexis Risk Solutions)


General Co-Chairs:
– Tom Conte, Georgia Institute of Technology
– Richard Vuduc, Georgia Institute of Technology

Program Co-Chairs
– Hyesoon Kim, Georgia Institute of Technology
– Sudhakar Yalamanchili, Georgia Institute of Technology

Tutorial Chair
– Guru Prasadh Venkataramani, George Washington University

For more information, visit

Call for Papers: IEEE Micro Top Picks 2016

Submitted by Dan Sorin—call-for-papers
September 1, 2015 at 12:00

Submitted by Dan Sorin—call-for-papers

Micro’s Top Picks from the Computer Architecture Conferences
Special Issue of IEEE Micro
May/June 2016

Paper submission deadline: October 16, 2015, 6:00 pm EDT
Submission website:

IEEE Micro will publish its yearly “Micro’s Top Picks from the Computer
Architecture Conferences” as its May/June 2016 issue. This issue collects some
of this year’s most significant research papers in computer architecture based
on novelty and potential for long-term impact. Any computer architecture paper
(not a combination of papers) published in the top conferences of 2015
(including MICRO-48) is eligible. IEEE Micro also distinguishes a number of
papers as IEEE Micro Top Pick Honorable Mentions.

The Top Picks committee will attempt to recognize those significant and
insightful papers that have the potential to influence the work of computer
architects for years to come.

To simplify reviewing, there is a mandatory format for submissions. Please
concatenate the following two documents into a single PDF file that is

1. A three-page, two-column document using 10-point type. The first two pages
should summarize the paper. The third page should argue for the potential of
the work to have long-term impact, clearly articulating why and how it will
influence other researchers and/or industry.

2. The final version of the original conference paper.

Submissions that do not follow this format will not be reviewed. The first page
of the submission should contain the names of the authors with a footnote that
contains the title of the original conference paper, with the full name of the
conference and date of publication.

Upon acceptance, authors will receive further instructions on how to prepare
final papers that conform to IEEE Micro’s guidelines (5000 words for the final
paper in IEEE Micro).

Submission Deadline: October 16, 2015 6:00 pm EDT
Author notification: January 29, 2016
Final papers due: February 19, 2016
Publication date: May/June 2016

Top Picks Guest Editors (and Co-Chairs of the Selection Committee):
Milo Martin, Google
Dan Sorin, Duke University

Program Committee:
Tor Aamodt, University of British Columbia
Sarita Adve, University of Illinois
Murali Annavaram, University of Southern California
Rajeev Balasubramonian, University of Utah
Ramon Canal, Universitat Politecnica de Catalunya
Fred Chong, University of Chicago
Joe Devietti, University of Pennsylvania
Sandhya Dwarkadas, Rochester University
Joel Emer, MIT/Nvidia
Erik Hagersten, Uppsala University
James Hoe, Carnegie Mellon University
Hillery Hunter, IBM Research
Martha Kim, Columbia University
Benjamin Lee, Duke University
Hsien-Hsin Lee, TSMC
Tong Li, Lenovo
Debbie Marr, Intel
Kathryn McKinley, Microsoft Research
Albert Meixner, Google
Trevor Mudge, University of Michigan
Satish Narayanasamy, University of Michigan
Mark Oskin, University of Washington
Ravi Rajwar, Intel
Partha Ranganathan, Google
Vijay Janapa Reddi, University of Texas – Austin
Daniel Sanchez, MIT
Karu Sankaralingam, University of Wisconsin
Karin Strauss, Microsoft Research/University of Washington
Ed Suh, Cornell University
Michael Taylor, University of California, San Diego
Tom Wenisch, University of Michigan
Greg Wright, Qualcomm
Pen-Chung Yew, University of Minnesota

Call for Nominations: MICRO Test of Time Award

Submitted by Onur Mutlu

Submitted by Onur Mutlu

MICRO Test of Time Award

Nominations deadline: September 15, 2015

The MICRO Test of Time (ToT) Award Committee is soliciting nominations for the
second MICRO ToT Award to be given at the International Symposium on
Microarchitecture in December 2015, to be held in Hawaii. This award recognizes
the most influential papers published in past MICRO conferences that have had
significant impact in the field.

The award will recognize an influential MICRO paper whose influence is still
felt 18-22 years after its initial publication. In other words, the award will
be given to at most one paper that was published at MICRO conferences in any of
the years N-22, N-21, N-20, N-19, or N-18. This year, N = 2015, so only papers
published at MICRO conferences held in 1993, 1994, 1995, 1996, 1997 are
eligible. An eligible paper that has received at least 100 citations (according
to Google Scholar) is automatically nominated, but explicit nominations of such
papers are still encouraged.

The following describes the nomination criteria and how to submit a nomination.

– Which papers are eligible for the 2015 MICRO ToT (Test of Time) Award?
Only papers published at MICRO conferences that happened between
1993-1997 (1993 and 1997 inclusive).

The list of eligible papers is at:

– Who can nominate a paper?
Anyone can nominate a paper except for the author or co-author of the
nominated paper.

– Is there a limit on the number of papers one person can nominate?
Yes. One can nominate up to 5 papers from all eligible papers. These
five papers can be published in any eligible year.

– When is the last day to submit a nomination?
Nominations must be received by September 15, 2015.

– How should a nomination be submitted?
Nominations must be submitted via email to

– What should be included in the nomination email?
1. The title, the author list, and publication year of the nominated paper
2. A 100-word (maximum) nomination statement, describing why the paper
deserves the Test of Time Award
3. The name, title, affiliation of the nominator, and if appropriate, the
relationship of the nominator to the authors

Only one paper can be nominated in a single email.

The MICRO ToT Award committee will evaluate all submitted nominations after
September 16, 2015 to select at most one paper for the 2015 MICRO ToT (Test
of Time) Award. A strict conflict of interest policy will be followed. If a
ToT Award Committee Member has a conflict of interest with a paper that is
nominated, the member will recuse himself/herself from the discussion process
and a substitute will be placed in.

The award will be presented to the authors of the selected paper at the
Awards Ceremony during the International Symposium on Microarchitecture in
December 2015, to be held in Hawaii. Awardees are not expected to make a

The award consists of an award certificate and peer recognition. The authors of
the selected paper are expected to be invited to write a retrospective of the
paper in the IEEE Micro magazine.

A list of the winners of the 2014 MICRO ToT Award is at:

Rich Belgard
Pradip Bose
Bill Mangione-Smith
Onur Mutlu, Chair
Andre Seznec
Uri Weiser