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November 1, 2014

Call for Papers: IJPP Special Issue on Workload Optimized Systems

Submitted by Parijat Dube
http://www.springer.com/10766

Springer International Journal of Parallel Programming (IJPP)
Special Issue on Workload Optimized Systems

 

The slowdown in Moore’s Law makes it increasingly important to optimize
systems around specific workloads. Such workload optimized systems have
hardware and/or software specifically designed to run well for a particular
workload or workload class. Such systems include, but are not limited to
traditional CPUs assisted with accelerators (ASICs, FPGAs, GPUs), memory
accelerators, I/O accelerators, hybrid systems, and IT appliances. This
workload optimized system approach contrasts to the broad general purpose
direction of computing over many decades. The workload optimized systems
approach is growing in importance, as we see in systems from cellphones to
tablets to routers to game machines to Top500 supercomputers, and IT
appliances such as IBM’s DataPower and Netezza, and Oracle’s Exadata. The
goal of this special issue is to foster awareness in industry and academic
community on workload optimized systems and to expose cross hw/sw stack
unique systems and software research challenges associated with such
systems. All submitted papers are subject to the same review process as those
papers accepted for publication in the regular issues. The special issue seeks
original papers on a range of topics related to workload optimized systems
including, but not limited to

- GPUs, FPGAs, ASIC Accelerators
- Memory and I/O accelerators
- Network accelerators
- Storage optimized systems
- System level accelerators
- IT Appliances
- Systems in specific domains like analytics, cloud, cognitive, mobile etc.
- Converged/Hybrid/Heterogeneous systems
- Cross hardware/software stack design and optimization
- Programming models for workload optimized systems
- Measurements and Experimentation
- Workload characterization and profiling
- Performance modeling and optimization
- Workload scheduling and orchestration
- Runtime management systems
- Industrial Experiences

IMPORTANT DATES
Manuscript due: March 27, 2015
First decision notification: June 5, 2015
Revision due: July 10, 2015
Final decision notification: August 14, 2015
Final version due: September 11, 2015

SUBMISSIONS
Authors are encouraged to submit high-quality, original work that
has neither appeared in, nor is under consideration by, other
journals. All papers will be reviewed following standard reviewing
procedures for the Journal.
Papers must be prepared in accordance with the Journal guidelines:

http://www.springer.com/10766.

Manuscripts must be submitted to: http://IJPP.edmgr.com.
Choose “S.I.: Workload Optimized Systems” as the article type.

GUEST EDITORS
Erik Altman, IBM Research, Yorktown Heights, NY. ealtman@us.ibm.com
Parijat Dube, IBM Research, Yorktown Heights, NY. pdube@us.ibm.com

 

Start: November 1, 2014
End: October 1, 2015

May 25, 2015

Call for Papers: RAW 2015

Submitted by Joao MP Cardoso
http://www.ece.lsu.edu/vaidy/raw

22nd Reconfigurable Architectures Workshop (RAW 2015)
Hyderabad, India
May 25, 2015
 

The 22nd Reconfigurable Architectures Workshop (RAW 2015)
will be held in Hyderabad, India in May 2015. RAW 2015 is
associated with the 29th Annual International Parallel &
Distributed Processing Symposium (IPDPS 2015) and is
sponsored by the IEEE Computer Society Technical Committee
on Parallel Processing. The workshop is one of the
major meetings for researchers to present ideas, results,
and on-going research on both theoretical and practical
advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized
by the ability of underlying hardware architectures or
devices to rapidly alter (often on the fly) the functionalities
of their components and the interconnection between them
to suit the problem at hand. The area has a rich theoretical
tradition and wide practical applicability. There are several
commercially available reconfigurable platforms
(FPGAs and coarse-grained devices) and many modern
applications (including embedded systems and HPC) use
reconfigurable subsystems. An appropriate mix of theoretical
foundations and practical considerations, including algorithms,
architectures, applications, technologies and tools,
is essential to fully exploit the possibilities offered
by reconfigurable computing. The Reconfigurable Architectures
Workshop aims to provide a forum for creative and productive
interaction for researchers and practitioners in the area.

TOPICS OF INTEREST
Authors are invited to submit manuscripts of original
unpublished research in all areas of reconfigurable systems,
including architectures, algorithms, applications,
software and cross-cutting areas. Topics of interest include,
but are not limited to:

Architectures & Algorithms
- Theoretical Interconnect and Computation Models
- Algorithmic Techniques and Mapping
- Run-Time Reconfiguration Models and Architectures
- Emerging Technologies (optical models, 3D Interconnects, devices)
- Bounds and Complexity Issues
- Analog Arrays

Reconfigurable Systems & Applications
- Reconfigurable accelerators (HPC, Bioinformatics, Multicore environments)
- Embedded systems and Domain-Specific solutions
(Digital Media, Gaming, Automotive applications)
- Distributed Systems & Networks
- Wireless and Mobile Systems
- Emerging applications (Organic Computing, Biology-Inspired Solutions)
- Critical issues (Security, Energy efficiency, Fault-Tolerance)

Software & Tools
- High-Level Design Methods (Hardware/Software co-design, Compilers)
- System Support (Soft processor programming)
- Runtime Support
- Reconfiguration Techniques (reusable artifacts)
- Simulations and Prototyping (performance analysis, verification tools)

SUBMISSION GUIDELINES
All manuscripts will be reviewed by at least three members
of the program committee. Submissions should be a complete
manuscript or, in special cases, may be a summary of relevant
work. The manuscript should be not exceed 8 single-spaced,
double-column pages using 10-point size font on
8.5X11 inch pages (IEEE conference style) including
references, figures and tables. A submission link will be
provided on this site by November 2014. Submitted papers
should not have appeared in or be under consideration
for a different workshop, conference or journal.
It is also expected that all accepted papers (regular or poster)
will be presented at the workshop by one of the authors.

PUBLICATION
IEEE CS Press will publish the IPDPS symposium and workshop
abstracts as a printed volume.
The complete symposium and workshop proceedings will also be published
by IEEE CS Press as a CD-ROM disk and be available
in the IEEE Digital Library.

IMPORTANT DATES
Submission deadline: January 6, 2015
Decision notification: February 1, 2015
Camera-Ready papers due: February 14, 2015
 

Start: May 25, 2015
End: May 25, 2015
Venue: Hyderabad, India

Call for Papers: Workshop on Large-Scale Parallel Processing

Submitted by Darren J. Kerbyson
http://hpc.pnl.gov/conf/LSPP/

Workshop on Large-Scale Parallel Processing
to be held in conjunction with
IEEE International Parallel and Distributed Processing Symposium
Hyderabed, India
May 25th, 2015
 

SUBMISSION DEADLINE: January 16th 2015
 

The workshop on Large-Scale Parallel Processing is a forum that
focuses on computer systems that utilize thousands of processors
and beyond. Large-scale systems, referred to by some as
extreme-scale and Ultra-scale, have many important research
aspects that need detailed examination in order for their
effective design, deployment, and utilization to take place.
These include handling the substantial increase in multi-core
on a chip, the ensuing interconnection hierarchy, communication,
and synchronization mechanisms. Increasingly this is becoming an
issue of co-design involving performance, power and reliability
aspects. The workshop aims to bring together researchers from
different communities working on challenging problems in this
area for a dynamic exchange of ideas. Work at early stages of
development as well as work that has been demonstrated in
practice is equally welcome.

Of particular interest are papers that identify and analyze novel
ideas rather than providing incremental advances in the following
areas:

- LARGE-SCALE SYSTEMS : exploiting parallelism at large-scale,
the coordination of large numbers of processing elements,
synchronization and communication at large-scale, programming
models and productivity

- NOVEL ARCHITECTURES AND EXPERIMENTAL SYSTEMS : the design of
novel systems, the use of processors in memory (PIMS),
parallelism in emerging technologies, future trends.

- MULTI-CORE : utilization of increased parallelism on a single
chip (MPP on a chip such as the Cell and GPUs), the possible
integration of these into large-scale systems, and dealing with
the resulting hierarchical connectivity.

- MONITORING, ANALYSIS AND MODELING : tools and techniques for
gathering performance, power, thermal, reliability, and other
data from existing large scale systems, analyzing such data
offline or in real time for system tuning, and modeling of
similar factors in projected system installations.

- ENERGY MANAGEMENT: Techniques, strategies, and experiences
relating to the energy management and optimization of
large-scale systems.

- APPLICATIONS : novel algorithmic and application methods,
experiences in the design and use of applications that scale to
large-scales, overcoming of limitations, performance analysis
and insights gained.

- WAREHOUSE COMPUTING: dealing with the issues in advanced
datacenters that are increasingly moving from co-locating many
servers to having a large number of servers working cohesively,
impact of both software and hardware designs and optimizations
to achieve best cost-performance efficiency.

Results of both theoretical and practical significance will be
considered, as well as work that has demonstrated impact at
small-scale that will also affect large-scale systems. Work may
involve algorithms, languages, various types of models, or
hardware.

SUBMISSION GUIDELINES
Papers should not exceed eight single-space pages (including
figures, tables and references) using a 12-point font on 8.5×11
inch pages. Submissions in PostScript or PDF should be made
using EDAS (www.edas.info). Informal enquiries can be made to
Darren.Kerbyson@pnl.gov. Submissions will be judged on correctness,
originality, technical strength, significance, presentation
quality and appropriateness. Submitted papers should not have
appeared in or under consideration for another venue.

IMPORTANT DATES
Submission deadline: January 16th 2015
Notification of acceptance: February 14th 2015
Camera-Ready Papers due: February 28th 2015

WORKSHOP CHAIRS
Darren J. Kerbyson, Pacific Northwest National Laboratory
Ram Rajamony, IBMa Austin Research Lab
Charles Weems,University of Massachusetts

STEERING COMMITTEE
Johnnie Baker,Kent State University
Alex Jones, University of Pittsburgh
H.J. Siegel, Colorado State University
Guangming Tan, ICT, Chinese Academy of Sciences
Lixin Zhang, ICT, Chinese Academy of Sciences

PROGRAM COMMITTEE
Pavan Balaji, Argonne National Laboratory, USA
Kevin J. Barker, Pacific Northwest National Laboratory
Laura Carrington, San Diego Supercomputer Center, USA
I-Hsin Chung, IBM T.J. Watson Research Lab, USA
Tim German, Los Alamos National Laboratory, USA
Georg Hager, University of Erlangen, Germany
Simon Hammond, Sandia National Laboratory, USA
Martin Herbordt, Boston University, USA
Kalapriya Kannan, IBM Research, India
Daniel Katz, University of Chicago, USA
Celso Mendes, University of Illinois Urbana-Champagne
Bernd Mohr,Forschungszentrum Juelich, Germany
Ankur Narang, IBM Research, India
Phil Roth, Oak Ridge National Laboratory, USA
Jose Sancho, Barcelona Supercomputer Center, USA
Gerhard Wellein, University of Erlangen, Germany
Ulrike Yang, Lawrence Livermore National Laboratory, USA

LOCAL WORKSHOP CHAIR
Ankur Narang, IBM Research India

LOCAL PUBLICITY CHAIR
Kalapriya Kannan, IBM Research India
 

Start: May 25, 2015
End: May 29, 2015
Venue: Hyderabad

May 26, 2015

Call for Papers: SYSTOR 2015

Submitted by Doron Chen
http://www.systor.org/2015/

The 8th ACM International Systems and Storage Conference (SYSTOR 2015)
Haifa, Israel
May 26-28, 2015

Paper submission deadline: March 5, 2015

SYSTOR has a broad scope, promoting experimental and practical computer
systems research encompassing the following topics:

- Operating systems, computer architecture, and their interactions
- Distributed, parallel, and cloud systems
- Networked, mobile, wireless, peer-to-peer, and sensor systems
- Runtime systems and compiler/programming-language support
- File and storage systems
- Security, privacy, and trust
- Virtualization
- Embedded and real-time systems
- Fault tolerance, reliability, and availability
- Deployment, usage, and experience
- Performance evaluation and workload characterization

IMPORTANT DATES:
- Full & short paper submission: March 5, 2015
- Highlights paper submission: April 30, 2015
- Paper notification: April 5, 2015
- Camera-ready submission: April 17, 2015
- Poster submission: April 30, 2015
- Poster notification: May 11, 2015

SYSTOR is a home for high-quality international systems research of a
practical nature and welcomes both academic and industrial contributions. We
solicit paper submissions in three separate categories:

- Full papers: should report original, previously unpublished high-
quality research, and be at most 10 pages of content, including everything
except references, which may use additional pages. The program committee
will review all submitted papers. Accepted papers will be presented at the
conference and included in the conference proceedings, to be published by
the ACM.

- Short papers: should report original, previously unpublished work for
which a full paper may not be suitable. Short paper submissions may report
on smaller ideas; unconventional ideas that are still in a preliminary stage
of development; interesting negative results; experimental (in)validation of
previous findings; controversial positions that challenge common wisdom; and
fresh approaches for addressing old problems. Short papers may be at most 5
pages, excluding references. They will undergo the same review process as
full papers. If accepted, short papers will be allocated a shorter talk slot
during the conference and will also be published in the conference
proceedings.

- Highlight papers: should contain exciting research results that have
been accepted to a recent top-tier systems conference or journal. A small
sub-committee will briefly review these submissions and will select the
most suitable ones for SYSTOR. The corresponding presentations will then be
“replayed” at SYSTOR for the benefit of the local community. A highlight
paper submission should include the full citation of the published or
accepted paper and a link to it. Accepted submissions will not be published
in the proceedings.

SYSTOR 2015 will host distinguished keynote speakers, a poster session, and
several social events at the conference. Our goal is to provide an excellent
forum for interaction across the systems community: international, academic,
and industrial, for both students and more established members.

Additional details can be found at: http://www.systor.org/2015/cfp.html

PROGRAM COMMITTEE CHAIRS
Gernot Heiser (NICTA and UNSW, Australia)
Idit Keidar (Technion)

GENERAL CHAIR
Dalit Naor (IBM Research)

POSTERS CHAIR
David Breitgand (IBM Research)

STEERING COMMITTEE HEAD
Michael Factor (IBM Research)

STEERING COMMITTEE
Ethan Miller (University of California Santa Cruz)
Liuba Shrira (Brandeis University)
Dan Tsafrir (Technion)
Yaron Wolfsthal (IBM Research)
Erez Zadok (Stony Brook University)
 

Start: May 26, 2015
End: May 28, 2015
Venue: Haifa, Israel

Call for Papers: SYSTOR 2015

Submitted by Doron Chen
http://www.systor.org/2015/

8th ACM International Systems and Storage Conference (SYSTOR 2015)
Haifa, Israel
May 26-28, 2015
 

Paper submission deadline: March 5, 2015

SYSTOR has a broad scope, promoting experimental and practical
computer systems research encompassing the following topics:
- Operating systems, computer architecture, and their interactions
- Distributed, parallel, and cloud systems
- Networked, mobile, wireless, peer-to-peer, and sensor systems
- Runtime systems and compiler/programming-language support
- File and storage systems
- Security, privacy, and trust
- Virtualization
- Embedded and real-time systems
- Fault tolerance, reliability, and availability
- Deployment, usage, and experience
- Performance evaluation and workload characterization

IMPORTANT DATES
- Full & short paper submission: March 5, 2015
- Highlights paper submission: April 30, 2015
- Paper notification: April 5, 2015
- Camera-ready submission: April 17, 2015
- Poster submission: April 30, 2015
- Poster notification: May 11, 2015

SYSTOR is a home for high-quality international systems
research of a practical nature and welcomes both academic and
industrial contributions. We solicit paper submissions in three
separate categories:

- Full papers: should report original, previously unpublished
high-quality research, and be at most 10 pages of content,
including everything except references, which may use
additional pages. The program committee will review all
submitted papers. Accepted papers will be presented at the
conference and included in the conference proceedings, to be
published by the ACM.

- Short papers: should report original, previously
unpublished work for which a full paper may not be suitable.
Short paper submissions may report on smaller ideas;
unconventional ideas that are still in a preliminary stage of
development; interesting negative results; experimental
(in)validation of previous findings; controversial positions
that challenge common wisdom; and fresh approaches for
addressing old problems. Short papers may be at most 5 pages,
excluding references. They will undergo the same review process
as full papers. If accepted, short papers will be allocated a
shorter talk slot during the conference and will also be
published in the conference proceedings.

- Highlight papers: should contain exciting research results
that have been accepted to a recent top-tier systems conference
or journal. A small sub-committee will briefly review these
submissions and will select the most suitable ones for SYSTOR.
The corresponding presentations will then be “replayed” at
SYSTOR for the benefit of the local community. A highlight
paper submission should include the full citation of the
published or accepted paper and a link to it. Accepted
submissions will not be published in the proceedings.

SYSTOR 2015 will host distinguished keynote speakers, a poster
session, and several social events at the conference. Our goal
is to provide an excellent forum for interaction across the
systems community: international, academic, and industrial, for
both students and more established members.

Additional details can be found at:

http://www.systor.org/2015/cfp.html

PROGRAM COMMITTEE CHAIRS
- Gernot Heiser (NICTA and UNSW, Australia)
- Idit Keidar (Technion)

GENERAL CHAIR
- Dalit Naor (IBM Research)

POSTERS CHAIR
- David Breitgand (IBM Research)

STEERING COMMITTEE HEAD
- Michael Factor (IBM Research)

STEERING COMMITTEE
- Ethan Miller (University of California Santa Cruz)
- Liuba Shrira (Brandeis University)
- Dan Tsafrir (Technion)
- Yaron Wolfsthal (IBM Research)
- Erez Zadok (Stony Brook University)

PUBLICITY CHAIR
- Doron Chen (IBM Research)
 

Start: May 26, 2015
End: May 28, 2015
Venue: Haifa, Israel

June 1, 2015

Call for Papers: Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems

Submitted by Loïc CUDENNEC
http://ImportantdatesaresynchronizedwiththeICCSmeeting

ALCHEMY Workshop 2015: Architecture, Languages, Compilation and
Hardware support for Emerging ManYcore systems

Held in conjunction with the International Conference on
Computational Science (ICCS 2015)
Reykjavik, Iceland
1-3 June 2015

Important dates are synchronized with the ICCS meeting

The International Conference on Computational Science is an annual
conference that brings together researchers and scientists from mathematics
and computer science as basic computing disciplines, researchers from various
application areas who are pioneering computational methods in sciences such
as physics, chemistry, life sciences, and engineering, as well as in arts and
humanitarian fields, to discuss problems and solutions in the area,
to identify new issues, and to shape future directions for research.

CALL FOR PAPERS
Massively parallel processors have entered high performance computing
architectures, as well as embedded systems. In June 2014, the TOP500
number one system (Tianhe-2) features the 57-core Intel Xeon Phi
processor. The increase of the number of cores on a chip is expected
to rise in the next years, as shown by the ITRS trends: other examples
include the Kalray MPPA 256-core chip, the 63-core Tilera GX processor
and even the crowd-funded 64-core Parallella Epiphany chip. In this
context, developers of parallel applications, including heavy
simulations and scientific calculations will undoubtedly have to cope
with many-core processors at the early design steps.

In the two past sessions of the Alchemy workshop, held together with
the ICCS meeting, we have presented significant contributions on the
design of many-core processors, both in the hardware and the software
programming environment sides, as well as some industrial-grade
application case studies. In this 2015 session, we seek academic
and industrial works that contribute to the design and the
programmability of many-core processors.

Topics include, but are not limited to:
* Programming models and languages for many-cores
* Compilers for programming languages
* Runtime generation for parallel programming on manycores
* Architecture support for massive parallelism management
* Enhanced communications for CMP/manycores
* Shared memory, data consistency models and protocols
* New operating systems, or dedicated OS
* User feedback on existing manycore architectures
(experiments with Adapteva Epiphany, Intel Phi, Kalray MPPA, ST
STHorm, Tilera Gx, TSAR..etc)

SUBMISSION INSTRUCTIONS
This year, there will be two formats for the presentation at the
workshop. The usual full-length paper is 10 pages according to the ICCS
format, and the short-paper format well fitted for works in progress,
with a maximum of 2 pages. The accepted papers for full-length paper
will be published alongside with the ICCS proceedings in Procedia
Computer Science, whereas the short-papers will be presentation and
poster only at the conference (with proceedings and presentations
available from the workshop website).

PROGRAM COMMITTEE
Akram BEN AHMED, University of Aizu, Fukushima, Japan
Camille COTI, Université de Paris-Nord, France
Loïc CUDENNEC, CEA, LIST, France
Stephan DIESTELHORST, ARM Ltd; Cambridge, UK
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Daniel ETIEMBLE, Université de Paris-Sud, France
Bernard GOOSSENS, Université de Perpignan, France
Vincent GRAMOLI, NICTA / University of Sydney, Australia
Jorn W. JANNECK, Lund University, Sweden
Vianney LAPOTRE, Université de Bretagne-Sud, France
Eric LENORMAND, Thales TRT, France
Stéphane LOUISE, CEA, LIST, France
Vania MARANGOZOVA-MARTIN, Université Joseph-Fourier Grenoble, France
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Erwan PIRIOU, CEA, LIST, France
Antoniu POP, University of Manchester, UK
Jason RIEDY, Georgia Institute of Technology, USA
Etienne RIVIERE, Université de Neuchâtel, Switzerland
Thomas ROPARS, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
Martha JOHANNA SEPULVEDA, INRIA, École Centrale de Lyon, France
(to be extended)
 

Start: June 1, 2015
End: June 3, 2015
Venue: Reykjavik, Iceland

Call for Papers: ALCHEMY Workshop (Deadline: Jan 15)

Submitted by Loïc CUDENNEC
https://sites.google.com/site/alchemyworkshop/

Architecture, Languages, Compilation and Hardware support
for Emerging ManYcore systems (ALCHEMY Workshop 2015)

Held in conjunction with ICCS 2015
Reykjavik, Iceland
1-3 June 2015

NEWS:
[1] Submission deadline extended to January 15.
[2] 27 thematic workshops are registered

http://www.iccs-meeting.org/iccs2015/registered-workshops.

[3] In addition to the Full Paper submission, we offer a Presentation Only
option (a short abstract is published in a book of abstracts,
but not in proceedings). You may also go for a Poster presentation,
with or without a full paper.

The International Conference on Computational Science (ICCS) is an annual
conference that brings together researchers and scientists from mathematics
and computer science as basic computing disciplines, researchers from various
application areas who are pioneering computational methods in sciences such
as physics, chemistry, life sciences, and engineering, as well as in arts and
humanitarian fields, to discuss problems and solutions in the area,
to identify new issues, and to shape future directions for research.

CALL FOR PAPERS:
Massively parallel processors have entered high performance computing
architectures, as well as embedded systems. In June 2014, the TOP500
number one system (Tianhe-2) features the 57-core Intel Xeon Phi
processor. The increase of the number of cores on a chip is expected
to rise in the next years, as shown by the ITRS trends: other examples
include the Kalray MPPA 256-core chip, the 63-core Tilera GX processor
and even the crowd-funded 64-core Parallella Epiphany chip. In this
context, developers of parallel applications, including heavy
simulations and scientific calculations will undoubtedly have to cope
with many-core processors at the early design steps.

In the two past sessions of the Alchemy workshop, held together with
the ICCS meeting, we have presented significant contributions on the
design of many-core processors, both in the hardware and the software
programming environment sides, as well as some industrial-grade
application case studies. In this 2015 session, we seek academic
and industrial works that contribute to the design and the
programmability of many-core processors.

Topics include, but are not limited to:
- Programming models and languages for many-cores
- Compilers for programming languages
- Runtime generation for parallel programming on manycores
- Architecture support for massive parallelism management
- Enhanced communications for CMP/manycores
- Shared memory, data consistency models and protocols
- New operating systems, or dedicated OS
- Security, crypto systems for manycores
- User feedback on existing manycore architectures (e.g., Adapteva
Epiphany, Intel Phi, Kalray MPPA, ST STHorm, Tilera Gx, TSAR, etc)

SUBMISSIONS:
This year, there will be two formats for the presentation at the
workshop. The usual full-length paper is 10 pages according to the ICCS
format, and the short-paper format well fitted for works in progress,
with a maximum of 2 pages. The accepted papers for full-length paper
will be published alongside with the ICCS proceedings in Procedia
Computer Science, whereas the short-papers will be presentation and
poster only at the conference (with proceedings and presentations
available from the workshop website).

The manuscripts of up to 10 pages, written in English and formatted
according to the EasyChair templates, should be submitted electronically.
Templates are available for download in the Easychair right-hand-side menu
in a “New submission” mode.

https://easychair.org/conferences/?conf=iccs20150

IMPORTANT DATES:
Submission Deadline: Jan 15, 2015
Notification Due: Feb 15, 2015
Final Version Due: Mar 15, 2015
Workshop: Jun 1 – 3, 2015

PROGRAM COMMITTEE:
Akram BEN AHMED, University of Aizu, Fukushima, Japan
Jeronimo CASTRILLON, CFAED / TU Dresden, Germany
Camille COTI, Université de Paris-Nord, France
Loïc CUDENNEC, CEA, LIST, France
Stephan DIESTELHORST, ARM Ltd; Cambridge, UK
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Daniel ETIEMBLE, Université de Paris-Sud, France
Bernard GOOSSENS, Université de Perpignan, France
Vincent GRAMOLI, NICTA / University of Sydney, Australia
Jorn W. JANNECK, Lund University, Sweden
Vianney LAPOTRE, Université de Bretagne-Sud, France
Eric LENORMAND, Thales TRT, France
Stéphane LOUISE, CEA, LIST, France
Vania MARANGOZOVA-MARTIN, Université Joseph-Fourier Grenoble, France
Marco MATTAVELLI, EPFL, Switzerland
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Erwan PIRIOU, CEA, LIST, France
Antoniu POP, University of Manchester, UK
Mickaël RAULET, IETR / INSA de Rennes, France
Jason RIEDY, Georgia Institute of Technology, USA
Etienne RIVIERE, Université de Neuchâtel, Switzerland
Thomas ROPARS, EPFL, Switzerland
Martha JOHANNA SEPULVEDA, INRIA, École Centrale de Lyon, France
Osamu TATEBE, AIST / University of Tsukuba, Japan
(to be extended)
 

Start: June 1, 2015
End: June 3, 2015
Venue: Reykjavik, Iceland

Call for Papers: HiPEAC 2016

Submitted by Daniel A. Jiménez
http://www.hipeac.net/conference

11th International Conference on High-Performance Embedded
Architectures and Compilers (HiPEAC 2016)

Prague, Czech Republic
January 18-20, 2016
 

SUBMISSION DEADLINE: June 1, 2015 (Submissions are accepted after
this deadline through the TACO review process)

Sponsored by HiPEAC Compilation & Architecture Seventh Framework
Programme.

The HiPEAC conference is the premier European forum for experts in computer
architecture, programming models, compilers and operating systems for
embedded and general-purpose systems. Associated workshops, tutorials,
special sessions, several large poster session and an industrial exhibition will
run in parallel with the conference. The three day event attracts over 500
delegates each year.

Paper selection is done by ACM TACO, the ACM Transactions on Architecture
And Code Optimization. Prospective authors submit their original papers to
ACM TACO at any time before the paper deadline of June 1, 2015 to benefit
from two rounds of reviews before the conference paper track cut-off date
which is November 15, 2015. Details of the new publication model called
ACM TACO 2.0 are available on the conference web site: model:

https://www.hipeac.org/2016/prague/call-for-papers/

Topics of interest include, but are not limited to:
- Processor, memory, and storage systems architecture
- Parallel, multi-core and heterogeneous systems
- Interconnection networks
- Architectural support for programming productivity
- Power, performance and implementation efficient designs
- Reliability and real-time support in processors, compilers and run-time
systems
- Application-specific processors, accelerators and reconfigurable processors
- Architecture and programming environments for GPU-based computing
- Simulation and methodology
- Architectural and run-time support for programming languages
- Programming models, frameworks and environments for exploiting parallelism
- Compiler techniques
- Feedback-directed optimization
- Program characterization and analysis techniques
- Dynamic compilation, adaptive execution, and continuous profiling/optimization
- Binary translation/optimization
- Code size/memory footprint optimizations

ORGANIZERS:
General Chair:
- Martin Palkovič, IT4Innovations, VŠB-Technical University of Ostrava

Program Chair:
- David Kaeli, Northeastern University

Workshops & Tutorials Chairs:
- Diana Göhringer, Ruhr-Universität Bochum
- Pedro Trancoso, University of Cyprus

Publicity Chairs:
- Daniel A. Jiménez, Texas A&M University
- Dimitrios Soudris, National Technical University of Athens
- Tom Vander Aa, Intel ExaScience Lab, Imec
- Bernhard Egger, Seoul National University

Exhibition Chair:
- Branislav Jansík, IT4Innovations, VŠB-Technical University of Ostrava

Poster Chair:
- Koen De Bosschere, Ghent University

Sponsor Chair:
- Albert Cohen, INRIA
- Bart Kienhuis, Leiden University

Industrial Session Chair:
- Daniel Gracia Pérez, Thales

Finance Chair:
- Vicky Wandels, Ghent University

Web and Registration Chair:
- Eneko Illarramendi, Ghent University

Local Arrangements Committee:
- Martin Palkovič, IT4Innovations, VŠB-Technical University of Ostrava
- Vít Vondrák, IT4Innovations, VŠB-Technical University of Ostrava
- Karina Pešatová, IT4Innovations, VŠB-Technical University of Ostrava
 

Start: June 1, 2015
End: June 1, 2015
Venue: Prague, Czech Republic

June 8, 2015

Call for Papers: ICS 2015

Submitted by Arun Kejariwal
http://www.cs.ucr.edu/~ics15/

ACM 29th International Conference on Supercomputing
 

ICS is the premier international forum for the presentation of research results
in high-performance computing systems. In 2015, the conference will be
held in Newport Beach, California. Papers are solicited on all aspects of the
research, development, and application of large-scale, high-performance
experimental and commercial systems, including:

- Computer architecture and hardware, including multicore and multiprocessor
systems,accelerators, memory, interconnection network and storage and file
systems;

- High-performance computational and programming models, including new
languages and middleware for high performance computing, auto-tuning
and function-specific code generators;

- High performance system software, including compilers, runtime systems,
programming and development tools, performance tools, and operating
systems;

- Hardware and software solutions for heterogeneity, reliability, and power
efficiency;

- Languages, runtimes, and hardware for “big data” scenarios with a focus
on high-performance data analytics, including scalable data structures,
dealing with large quantities of unstructured data, online monitoring and
I/O, and parallel visualization;

- Computationally challenging scientific and commercial applications,
particularly studies and experiences on large-scale systems, and
supercomputing on big data problems;

- Large scale installations, including case studies to guide the design of
future systems and solutions for efficiently scaling power, performance,
reliability and sustainability;

- Novel infrastructures for internet, grid and cloud computing;

- Performance evaluation studies and theoretical underpinnings of any of the
above topics.

Of particular interest are papers on any aspects of extreme-scale and
heterogeneous supercomputing systems, integrated HPC software stacks, and
supercomputing applications in science and engineering. Papers should not
exceed 10 pages in the ACM format.

The review process will include a rebuttal period. The important dates are given
below:

IMPORTANT DATES:
Abstract submission: January 9, 2015 (Friday) AOE
Paper submission: January 16, 2015 (Friday) AOE
Workshop/Tutorial proposals: January 23, 2015 (Friday) AOE
Workshop/Tutorial notification: January 28, 2015 (Wednesday) AOE
Author rebuttal period: March 2-4, 2015
Author notification: March 16, 2015 (Monday)
Early registration deadline: March 27, 2015 (Monday)
Final papers: March 30, 2015 (Monday) AOE

AOE (Anywhere on Earth) dates shown above mean the deadlines are at 11:59pm
UTC-12:00 of the days. The above dates are tentative and subject to change.
Consult the conference website for the most up-to-date scheduling information.

For more information: please visit http://www.cs.ucr.edu/~ics15/
 

Start: June 8, 2015
End: June 11, 2015
Venue: Newport Beach, California

Call for Participation: ICS 2015 (Early registration deadline: May 17)

Submitted by Arun Kejariwal
http://www.cs.ucr.edu/~ics15/

29th International Conference on Supercomputing (ICS 2015)
Newport Beach, California
8-11 June, 2015

Sponsored by ACM/SIGARCH

EARLY REGISTRATION DEADLINE: May 17, 2015 (extended)

ICS is the premier international forum for the presentation of research
results in high-performance computing systems. This year the conference
will be held at Hyatt Regency, Newport Beach, California.

The technical program features keynote addresses by three leading
authorities in high performance computing:

K1 Datacenter efficiency — What’s next?
Ricardo Bianchini
Professor, Rutgers University and Chief Efficiency Strategist
Microsoft Research

K2 Streaming Task Parallelism
Albert Cohen
Senior Research Scientist, INRIA

K3 Automatically Scalable Computation
Margo Seltzer
Herchel Smith Professor of Computer Science
Harvard College Professor

The conference program is available at:

http://www.cs.ucr.edu/~ics15/program.htm

A Best Paper Award will be given according to the selection made
by the audience among all technical papers.

ICS will also co-host several workshops and tutorials details of
which are given at:

http://www.cs.ucr.edu/~ics15/workshops_tutorials.htm

Early Registration May 17, 2015

ORGANIZING COMMITTEE:
General Chair:
- Laxmi Bhuyan, UC Riverside

Program Co-Chairs:
- Fred Chong, UC Santa Barbara
- Vivek Sarkar, Rice University

Workshops and Tutorials Co-Chairs:
- Murali Annavaram, University of Southern California

Start: June 8, 2015
End: June 11, 2015
Venue: Newport Beach, CA