Call for papers: SPAA 2016

Submitted by Nodari Sitchinava
http://spaa.acm.org
November 25 to February 5, 2016

28th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2016)
Asilomar State Beach, California, USA
July 11-13, 2016
 

IMPORTANT DATES:
Regular paper submission deadline: Feb 5, 11:59pm HAST
Brief announcements submission deadline: Feb 26, 11:59pm HAST
Rebuttal period: March 22-25
Notification: April 11
 

Submissions are sought in all areas of parallel algorithms and architectures,
broadly construed, including both theoretical and experimental perspectives.
Topics of interest include, but are not limited to:
– Parallel and Distributed Algorithms
– Parallel and Distributed Data Structures
– Parallel Complexity Theory
– Scheduling in Parallel Systems
– Specification and Verification of Concurrent Systems
– Parallel and Distributed Architectures
– Multiprocessor and Multicore Architectures
– Transactional Memory Hardware and Software
– Instruction Level Parallelism and VLSI
– Compilers and Tools for Concurrent Programming
– Algorithms for GPUs and Other Alternative Parallel Architectures
– High-Performance Parallel Computing and Architectures
– Green & Power-Efficient Algorithms and Architectures
– Biological Distributed Algorithms
– Network Algorithms
– Algorithms for Routing and Information Dissemination
– Peer-to-Peer Systems
– Fault-tolerance and Reliability
– Security and Privacy in Distributed and Parallel Systems
– Parallel/Distributed Computational Learning
– Parallel/Distributed issues in Big Data
– Resource Management and Awareness

SUBMISSION GUIDELINES:
Regular papers:
Regular papers should report on original research, submitted exclusively to
this conference. Submissions may not exceed ten (10) single-spaced
double-column pages. (Papers will be judged based on their quality and not
their length—short papers are welcome.) The title page, bibliography and
designated figure pages (containing only figures) are not counted toward the
ten pages. (Illustrative figures are encouraged.) All necessary details to
substantiate the main claims of the paper should be included in a clearly
marked appendix. Regular papers will be allotted up to 10 pages in the
proceedings. Every regular paper is eligible for the best paper award.

Brief announcements:
SPAA also solicits brief announcements that raise issues of interest to the
SPAA community. Brief announcements may not exceed two pages. Examples of good
brief announcements include: (i) papers previously published elsewhere of
interest to SPAA, (ii) work in progress, (iii) announcement of tools/libraries,
(iv) challenge problems posed to the community, (v) corrections to earlier
results. Brief announcements may also include smaller results of interest.

Authors may request that a regular paper be considered as a brief announcement.
As far as possible, the program committee will remain blind to this request
until status as a regular paper has been resolved. Such a request will not
affect the chances of the manuscript to be accepted as a regular paper.

Papers should be submitted in standard ACM format, i.e., 9-point font on 8.5×11
inch pages. For detailed submission instructions and formatting, please see
conference web site.

ORGANIZING COMMITTEE:
Program Chair:
Seth Gilbert (NUS)

General Chair:
Christian Scheideler (Univ. of Paderborn)

Local Arrangements:
Bradley Kuszmaul (MIT)

Treasurer:
David Bunde (Knox College)

Publicity Chair:
Nodari Sitchinava (Univ. of Hawaii, Manoa)

Secretary:
Jeremy Fineman (Georgetown Univ.)

Program Committee:
Dan Alistarh (Microsoft Research)
Yossi Azar (Tel Aviv Univ.)
Michael Bender (Stony Brook Univ.)
Costas Busch (Louisiana State Univ.)
Yuval Emek (Technion)
Antonio Fernández Anta (IMDEA)
Jeremy Fineman (Georgetown Univ.)
Phil Gibbons (CMU)
Seth Gilbert (NUS)
Magnús M. Halldórsson (Reykjavík University)
Stephan Holzer (MIT)
Fabian Kuhn (Univ. of Freiburg)
Yossi Lev (Oracle)
Ishai Menache (Microsoft Research)
Ben Mosely (Wash. Univ. in St. Louis)
Calvin Newport (Georgetown Univ.)
Merav Parter (MIT)
Boaz Patt-Shamir (Tel Aviv Univ.)
Seth Pettie (Univ. of Michigan)
Cynthia Phillips (Sandia Natl. Lab.)
Kirk Pruhs (Univ. of Pittsburgh)
Peter Robinson (Queen’s Univ. Belfast)
Thomas Sauerwald (Cambridge)
Stefan Schmid (Aalborg Univ.)
Michael Scott (Univ. of Rochester)
Julian Shun (UC Berkeley)
Aravind Srinivasan (Univ. of Maryland)
Maxwell Young (Mississippi State Univ.)

Call for Papers: IEEE Micro Special Issue on Internet of Things

Submitted by Vijay Janapa Reddi
https://mc.manuscriptcentral.com/micro-cs
April 29, 2016

Submitted by Vijay Janapa Reddi
https://mc.manuscriptcentral.com/micro-cs

IEEE Micro Special Issue on Internet of Things

The Internet of Things (IoT) revolution is happening at an unprecedented pace.
New devices are rapidly emerging every day and virtually every device is a
“smart” device with intelligence built into it and these devices are bred for
connectivity. Widespread connectivity amongst these intelligent devices has
the potential to transform society and lead to a wide range of new
applications and services. To enable this transformation, however, we need a
large number of technological advancements in the hardware and software
communities to come together. In this special call, we solicit papers from a
broad range of areas:

– Architecture design and interface with networking and sensor devices
– Processor, sensor design for edge devices and gateways
– End-to-end system architecture design for IoT
– Edge analytics and big data processing for IoT
– Programming models, runtimes and tools for IoT
– Case studies, practices, and evaluations for IoT
– Cross-cutting issues in IoT systems, including security, portability
– Others (if in doubt about the topic, please contact us)

Please keep in mind that IEEE Micro is about computer architecture at large
and that it is a very high-quality publication. We will enforce these two
criteria strongly to ensure quality readership.

IMPORTANT DATES:
Initial submissions due: April 29, 2016
Initial notifications: June 24, 2016
Revised papers due: July 22, 2016
Final notifications: September 2, 2016
Final versions: September 9, 2016

Guest Co-Editors:
Vijay Janapa Reddi, The University of Texas at Austin
Hyesoon Kim, Georgia Institute of Technology

Call for Papers: IEEE Transactions on Computers – Secure Computer Architectures

Submitted by Ruby Lee
http://www.computer.org/cms/Computer.org/transactions/cfps/cfp_tcsi_sca.pdf
May 30, 2016

Submitted by Ruby Lee
http://www.computer.org/cms/Computer.org/transactions/cfps/cfp_tcsi_sca.pdf

IEEE Transactions on Computers
Special Section on Secure Computer Architectures

 

IEEE Transactions on Computers seeks original manuscripts for a Special
Section on Secure Computer Architectures tentatively scheduled to appear
in the July 2017 issue. The topics of interest for this special section
include:

– Cryptographic Primitives
– Homomorphic Computing and Multiparty Computing
– Scalability Issues of Server-level Secure Computing
– High Performance/Low Power Cryptography
– Oblivious RAM
– Side-Channel Analysis
– Side-channel Attacks and Defenses
– Hardware Trojans and Backdoors
– Hardware Vulnerabilities – Counters, Caches, Shared Memory
– Computing Architectures for Isolation
– Smartphone Security
– Embedded Systems Security
– Secure Processors and Systems
– Hardware Security
– Secure Virtualization and Memory Safety
– Security Simulation, Testing, Validation and Verification
– Metrics for Tamper Resistance
– Security Metrics
– Standards in Secure Computing
– Instruction-Sets for Security and Cryptography
– Dedicated and Protected Storage
– Secure Computer Interfaces

IMPORTANT DATES:
Submission Due: 30 May 2016
First Decision: 31 August 2016
Revisions: 30 September 2016
Acceptance: 15 December 2016
Publication: July 2017

Guest Editors:
Ruby Lee, Princeton University
Patrick Schaumont, Virginia Tech
Ron Perez, Cryptography Research Inc
Guido Bertoni, ST Microelectronics

Call for Proposals: ISPASS 2016 Workshops and Tutorials

Submitted by Stefanos Kaxiras
http://www.ispass.org/ispass2016/
December 30, 2015

Submitted by Stefanos Kaxiras
http://www.ispass.org/ispass2016/

Workshops and Tutorials at ISPASS
Uppsala, Sweden
April 17, 2016
 

CALL FOR TUTORIAL PROPOSALS

Submission deadline: Wednesday, December 30, 2015
Notification: Friday, January 8, 2016

Tutorial proposals are solicited for ISPASS-2016, Uppsala, Sweden.
Tutorials will be held on Apr 17, 2016.

Proposals for both half- and full-day tutorials are solicited on any
topic that is relevant to the ISPASS audience. Tutorials that focus on
workload characterization and analysis tools and techniques that enable
research across layers of the computational stack are strongly encouraged.

In previous years, tutorials seeking to achieve any of the following
goals have been particularly successful:
– Describe an important piece of research/experimental infrastructure.
– Educate the community on an emerging topic.

Proposals should provide the following information:
– Title of the tutorial
– Presenter(s) and contact information.
– Proposed duration (full day, half day).
– 1-2 paragraph abstract suitable for tutorial publicity.
– 1 paragraph biography per presenter suitable for tutorial publicity.
– Short description (for evaluation). This should include:
1) Tutorial scope and objectives,
2) Topics to be covered,
3) Target audience,
4) If the tutorial has been held previously, the location (i.e.,
conference), date, and number of attendees.

Proposals should take the form of a PDF document, and be submitted via
e-mail to Stefanos Kaxiras (stefanos.kaxiras@it.uu.se), with the subject
“ISPASS 2016 Tutorial Proposal”. Submissions will be acknowledged via
e-mail.
 

CALL FOR WORKSHOP PROPOSALS

Submission deadline: Wednesday, December 30, 2015
Notification: Friday, January 8, 2016

Workshop proposals are solicited for ISPASS-2016, Uppsala, Sweden.
Workshops will be held on Apr 17, 2016.

Proposals related to power/performance analysis and workload
characterization as it relates to computer architecture, operating
systems, programming languages/compilers in current and emerging areas
such as datacenters and cloud computing, systems based on non-volatile
memory technologies, mobile technologies, large scale data analysis,
smart infrastructure, and extreme scale computing are encouraged.

Proposals should provide the following information:
– Title of the workshop
– Organizers and their affiliations
– Sample call for papers
– Duration – Half-Day or Full Day
– Preferred Day – Saturday or Sunday
– If the workshop was previously held, the location (conference), date,
and number of attendees

Proposals should take the form of a PDF document, and be submitted via
e-mail to Stefanos Kaxiras (stefanos.kaxiras@it.uu.se), with the subject
“ISPASS 2016 Workshop Proposal”. Submissions will be acknowledged via
e-mail.

Call for Papers: ALCHEMY Workshop 2016

Submitted by Loïc CUDENNEC
http://sites.google.com/site/alchemyworkshop
June 6 to June 8, 2016

Submitted by Loïc CUDENNEC
http://sites.google.com/site/alchemyworkshop

Architecture, Languages, Compilation and Hardware support for
Emerging ManYcore systems (ALCHEMY Workshop 2016)

in conjunction with ICCS 2016
San Diego, CA, USA
6-8 June 2016
 

IMPORTANT DATES:
Submission Deadline – Dec 18, 2015
Notification Due – Jan 27, 2016
Final Version Due – Mar 4, 2016
Workshop dates: Jun 6 – Jun 8, 2016
 

Massively parallel processors have entered high performance computing
architectures, as well as embedded systems. In this context, developers of
parallel applications, including heavy simulations and scientific calculations,
will have to cope with many-core processors at the early design steps.

In the past sessions of the Alchemy workshop, held together with the ICCS
meeting, we have presented significant contributions on the design of
many-core processors, both in the hardware and the software programming
environment sides, as well as some industrial-grade application case studies.
In this 2016 session, we seek academic and industrial works that contribute to
the design and the programmability of many-core processors.

Topics include, but are not limited to:
– Programming models and languages for many-cores
– Compilers for programming languages
– Runtime generation for parallel programming on manycores
– Architecture support for massive parallelism management
– Enhanced communications for CMP/manycores
– Shared memory, data consistency models and protocols
– New operating systems, or dedicated OS
– Security, crypto systems for manycores
– User feedback on existing manycore architectures (e.g., Adapteva Epiphany,
Intel Phi, Kalray MPPA, ST STHorm, Tilera Gx, TSAR..etc)
– Many-core integration within HPC systems (micro-servers)

SUBMISSION GUIDELINES:
This year, there will be two formats for the presentation at the workshop. The
usual full-length paper is 10 pages according to the ICCS format, and the
short-paper format well fitted for works in progress, with a maximum of 2
pages. The accepted papers for full-length paper will be published alongside
with the ICCS proceedings in Procedia Computer Science, whereas the
short-papers will be presentation and poster only at the conference (with
proceedings and presentations available from the workshop website).

The manuscripts of up to 10 pages, written in English and formatted according
to the EasyChair templates, should be submitted electronically.
Templates are available for download in the Easychair right-hand-side menu
in a “New submission” mode.
https://easychair.org/conferences/?conf=iccs20160

ORGANIZING COMMITTEE:
Program Co-Chairs:
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Antoniu POP, University of Manchester, UK

Program Committee:
Camille COTI, Université de Paris-Nord, France
Loïc CUDENNEC, CEA, LIST, France
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Vianney LAPOTRE, Université de Bretagne-Sud, France
Stéphane LOUISE, CEA, LIST, France
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Erwan PIRIOU, CEA, LIST, France
Antoniu POP, University of Manchester, UK
Thomas ROPARS, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
Martha Johanna SEPULVEDA, INRIA, École Centrale de Lyon, France
(to be extended)

Call for papers: SPAA 2016

Submitted by Nodari Sitchinava
http://spaa.acm.org
November 25 to February 5, 2016

Submitted by Nodari Sitchinava
http://spaa.acm.org

28th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA 2016)
Asilomar State Beach, California, USA
July 11-13, 2016
 

IMPORTANT DATES:
Regular paper submission deadline: Feb 5, 11:59pm HAST
Brief announcements submission deadline: Feb 26, 11:59pm HAST
Rebuttal period: March 22-25
Notification: April 11
 

Submissions are sought in all areas of parallel algorithms and architectures,
broadly construed, including both theoretical and experimental perspectives.
Topics of interest include, but are not limited to:
– Parallel and Distributed Algorithms
– Parallel and Distributed Data Structures
– Parallel Complexity Theory
– Scheduling in Parallel Systems
– Specification and Verification of Concurrent Systems
– Parallel and Distributed Architectures
– Multiprocessor and Multicore Architectures
– Transactional Memory Hardware and Software
– Instruction Level Parallelism and VLSI
– Compilers and Tools for Concurrent Programming
– Algorithms for GPUs and Other Alternative Parallel Architectures
– High-Performance Parallel Computing and Architectures
– Green & Power-Efficient Algorithms and Architectures
– Algorithms for Social Networks
– Biological Distributed Algorithms
– Network Algorithms
– Algorithms for Routing and Information Dissemination
– Peer-to-Peer Systems
– Mobile, Ad-Hoc, Wireless and Sensor Networks
– Fault-tolerance and Reliability
– Self-stabilization and Self-organization
– Security and Privacy in Distributed and Parallel Systems
– Parallel/Distributed Computational Learning
– Game Theory and Collaborative Learning
– Parallel/Distributed issues in Big Data
– Resource Management and Awareness

SUBMISSION GUIDELINES:
Regular papers:
Regular papers should report on original research, submitted exclusively to
this conference. Submissions may not exceed ten (10) single-spaced
double-column pages. (Papers will be judged based on their quality and not
their length—short papers are welcome.) The title page, bibliography and
designated figure pages (containing only figures) are not counted toward the
ten pages. (Illustrative figures are encouraged.) All necessary details to
substantiate the main claims of the paper should be included in a clearly
marked appendix. Regular papers will be allotted up to 10 pages in the
proceedings. Every regular paper is eligible for the best paper award.

Brief announcements:
SPAA also solicits brief announcements that raise issues of interest to the
SPAA community. Brief announcements may not exceed two pages. Examples of good
brief announcements include: (i) papers previously published elsewhere of
interest to SPAA, (ii) work in progress, (iii) announcement of tools/libraries,
(iv) challenge problems posed to the community, (v) corrections to earlier
results. Brief announcements may also include smaller results of interest.

Authors may request that a regular paper be considered as a brief announcement.
As far as possible, the program committee will remain blind to this request
until status as a regular paper has been resolved. Such a request will not
affect the chances of the manuscript to be accepted as a regular paper.

Papers should be submitted in standard ACM format, i.e., 9-point font on 8.5×11
inch pages. For detailed submission instructions and formatting, please see
conference web site.

ORGANIZING COMMITTEE:
Program Chair:
Seth Gilbert (NUS)

General Chair:
Christian Scheideler (Univ. of Paderborn)

Local Arrangements:
Bradley Kuszmaul (MIT)

Treasurer:
David Bunde (Knox College)

Publicity Chair:
Nodari Sitchinava (Univ. of Hawaii, Manoa)

Secretary:
Jeremy Fineman (Georgetown Univ.)

Program Committee:
Dan Alistarh (Microsoft Research)
Yossi Azar (Tel Aviv Univ.)
Michael Bender (Stony Brook Univ.)
Costas Busch (Louisiana State Univ.)
Yuval Emek (Technion)
Antonio Fernández Anta (IMDEA)
Jeremy Fineman (Georgetown Univ.)
Phil Gibbons (CMU)
Seth Gilbert (NUS)
Magnús M. Halldórsson (Reykjavík University)
Stephan Holzer (MIT)
Fabian Kuhn (Univ. of Freiburg)
Yossi Lev (Oracle)
Ishai Menache (Microsoft Research)
Ben Mosely (Wash. Univ. in St. Louis)
Calvin Newport (Georgetown Univ.)
Merav Parter (MIT)
Boaz Patt-Shamir (Tel Aviv Univ.)
Seth Pettie (Univ. of Michigan)
Cynthia Phillips (Sandia Natl. Lab.)
Kirk Pruhs (Univ. of Pittsburgh)
Peter Robinson (Queen’s Univ. Belfast)
Thomas Sauerwald (Cambridge)
Stefan Schmid (Aalborg Univ.)
Michael Scott (Univ. of Rochester)
Julian Shun (UC Berkeley)
Aravind Srinivasan (Univ. of Maryland)
Maxwell Young (Mississippi State Univ.)

Call for Papers: TRANSACT 2016 (Deadline extended)

Submitted by Stephan Diestelhorst
http://conf.researchr.org/track/PPoPP-2016/TRANSACT-2016
November 28, 2015

Submitted by Stephan Diestelhorst
http://conf.researchr.org/track/PPoPP-2016/TRANSACT-2016

11th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT 2016)

Due to popular demand, we have extended the TRANSACT 2016 paper submission
deadline by two weeks to 28 Nov 2015! TRANSACT 2016 will be held in
conjunction with PPoPP 2016, HPCA 2016, and CGO 2016 in Barcelona, Spain
on Sat, 12th Mar 2016. TRANSACT is _the_ venue to discuss new work on
transactional memory and related technologies across the compute stack,
of course including Computer Architecture.

Additional information along with the full CfP available on the workshop web site.

Call for Papers: Sensor to Cloud Architectures Workshop

Submitted by Govind Sreekar Shenoy
https://sites.google.com/site/scaw16/home
March 13, 2016

Submitted by Govind Sreekar Shenoy
https://sites.google.com/site/scaw16/home

Sensor to Cloud Architectures Workshop (SCAW-2016)
in conjunction with HPCA 2016
Barcelona, Spain
March 13, 2016
 

IMPORTANT DATES:
Paper submission deadline: January 8, 2016 (23:59 PST)
Author notification: January 18, 2016
Final paper submission: February 19, 2016
Workshop: March 13, 2016

The computer industry is witnessing an inflection point – ‘Internet of things
combined with Cloud Analytics’ – which has implications from end (sensor
devices) to end (cloud architectures). Many technologies come together
contributing to this major inflection point: Computing platforms getting
smaller (e.g. handheld devices, wearables), richer (e.g. image and language
understanding) and broader (i.e. reaching the masses via Internet of Things).
Sensors operating in constrained environments connected through intelligent
gateways and cloud backend creates a very complex environment for the
operators, system integrators, and developers of this new emerging technology.
Discovering and managing sensor devices; collecting, cleaning and storing
discoverable data; normalizing, aggregating and analyzing the data for insights
and actions; managing the security and privacy of the data, enforcing the
access privileges and trusted execution environments – all these are required
to make this revolution happen.

The research challenges in IoT platforms are multi-fold:
– providing rich functionality and wider power/performance range for sensor devices
– attempting to cover a broad range of applications that can be migrated
from cloud to gateways and sensor devices
– enabling a scalable and modular cloud architecture that provides the
required real-time and uptime capabilities
– providing a rich software programming environment that eases the challenge
of developing applications on end to end platforms consisting of elements
ranging from sensors to gateways to cloud.

The goal of this workshop is to bring together academic researchers and
industry practitioners to discuss future IoT sensor-to- cloud architectures
including sensors, gateways and cloud architectures.

Topics of interest include, but are not restricted to, the following:

1) Sensors, Actuators, Gateway & Controllers Architectures:
– Architectures for wearable and IOT devices
– Heterogeneity in Cores, Frequency, Cache, Memory
– Power, Performance, Energy optimizations
– SoCs, CPU/GPU, CPU/GPGPU architectures
– Ultra-Low Power Core Micro-architectures
– Fabrics / Network-on-chip, Cache/Memory Hierarchies
– HW Support for Heterogeneity, Programmability, Modularity
– Simulation / Emulation Methodologies
– Protocols and abstraction layers (MQTT, CoAP, REST, …)

2) Cloud Architecture:
– Data Center Architectures for IoT
– Edge/Fog computing, Dynamic Cloud-gateway-device offloads
– Workload partitioning between heterogeneous cores and accelerators
– BigData Frameworks (Hadoop, Spark, Flink, …)
– Heterogeneous Datacenters (FPGA, GPU, Accelerators)
– Machine Learning Algorithms & Applications, Graph processing,
Deep Neural Networks
– Batch, streaming and distributed Analytics
– Design Patterns and Application Programming frameworks

3) Emerging Workloads and Use cases:
– Wearable and IOT use cases and workloads
– Speech/Image recognition and understanding, Cognitive computing
– Personal Assistants, Predictive/Prescriptive Analytics, Robotics
– Workload Analysis for power/performance/energy optimization and
acceleration
– Performance Monitoring and Simulation, Architecture analysis

4) Novel Accelerator Designs:
– Specialized Accelerator Architectures and Designs
– Machine Learning, Neural Network and Graph Processing accelerators
– Domain-Specific Programmable/Configurable Accelerators
– Accelerator Interfaces for Programmability
– Development Environments for Accelerator Design

SUBMISSION GUIDELINES:
Interested authors are encouraged to submit extended abstracts (1-2 pages)
or short papers (6 pages) by email to the organizing chairs. The deadline for
submission is January 8, 2016.

ORGANIZERS:
Ramesh Illikkal, Intel
Ravi Iyer, Intel
Murali Emani, University of Edinburgh
Govind Sreekar Shenoy, University of Edinburgh

Call for Papers: TRANSACT 2016

Submitted by Stephan Diestelhorst
http://conf.researchr.org/track/PPoPP-2016/TRANSACT-2016
November 14, 2015

Submitted by Stephan Diestelhorst
http://conf.researchr.org/track/PPoPP-2016/TRANSACT-2016

11th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT 2016)

The paper deadline for TRANSACT 2016 is approaching: 14 Nov 2015. TRANSACT
2016 will be held in conjunction with PPoPP 2016, HPCA 2016, and CGO 2016 in
Barcelona, Spain on Sat, 12th Mar 2016. TRANSACT is _the_ venue to discuss new
work on transactional memory and related technologies across the compute stack,
of course including Computer Architecture.

Additional information along with the full CfP available at the web site.

Call for Papers: VEE 2016

Submitted by Don Porter
http://conf.researchr.org/home/vee-2016
November 23 to November 30, 2015

Submitted by Don Porter
http://conf.researchr.org/home/vee-2016

12th ACM International Conference on Virtual Execution Environments (VEE’16)
co-located with ASPLOS 2016
Atlanta, Georgia, USA
April 2-3, 2016
 

IMPORTANT DATES:
– Abstract deadline: Monday, November 23, 2015 (11:59PM EST)
– Full paper deadline: Monday, November 30, 2015 (11:59pm, EST)
– Author response period: Tuesday-Wednesday, January 26-27, 2016
– Author notification: Friday, February 5, 2016
– Conference: Saturday-Sunday, April 2-3, 2016

Virtualization has a central role in modern systems. It constitutes a key
aspect in a wide range of environments, from small mobile computing devices to
large-scale data centers and computational clouds. Virtualization techniques
encompass the underlying hardware, the operating system, and the runtime
system. Although these layers have different design and implementation
techniques, the fundamental challenges and insights tend to be similar.

VEE’16 brings together researchers and practitioners from different computer
systems domains to interact and share ideas in order to advance the state of
the art of virtualization and broaden its applicability. VEE’16 accepts both
full-length and short papers. Both types of submissions are reviewed to the
same standards and differ primarily in the scope of the ideas expressed. Short
papers are limited to half the space of full-length papers. The program
committee will not accept a full paper on the condition that it is cut down to
fit in a short paper slot, nor will it invite short papers to be extended to
full length. Submissions will be considered only in the category in which they
are submitted.

We invite authors to submit original papers related to virtualization
across all layers of the software stack down to the microarchitectural
level. Topics of interest include (but are not limited to):
– virtualization support for programs and programmers;
– architecture support for virtualization;
– operating system support for virtualization;
– compiler and programming language support for virtualization;
– runtime system support for virtualization;
– virtual I/O, storage, and networking;
– memory management;
– managed runtimes and virtual machines;
– management technologies for virtual environments;
– performance analysis and debugging for virtual environments;
– security and virtual environments;
– virtualization in cloud computing;
– virtualization technologies applied to specific problem domains
– such as HPC, realtime, and power management.

ORGANIZING COMMITTEE:
General Chair:
Vishakha Gupta-Cledat (Intel Research)

Program Co-chairs:
Don Porter (Stony Brook University)
Vivek Sarkar (Rice University)

Program Committee:
Jonathan Appavoo, Boston University
Tzi-Cker Chieuh, Industrial Technology Research Institute, Taiwan
John Criswell, University of Rochester
Dilma Da Silva, Texas A&M University
Julian Dolby, IBM Thomas J. Watson Research Center
Bjoern Franke, University of Edinburgh
Soo-Mook Moon, Seoul National University
Guilherme Ottoni, Facebook
Kevin Pedretti, Sandia National Laboratories
Don Porter, Stony Brook University (co-chair)
Behnam Robatmili, Qualcomm Research
Chris Rossbach, VMware Research and The University of Texas at Austin
Vivek Sarkar, Rice University (co-chair)
Mark Silberstein, Technion—Israel Institute of Technology
Mary Lou Soffa, University of Virginia
Malgorzata Steinder, IBM Research
Priyanka Tembey, VMware
Peng Wu, Huawei America Lab