RISC-V Workshop and Bootcamp

RISC-V (pronounced “risk-5”) is a new instruction set architecture
(ISA) that was originally designed to support computer architecture research and education, but which we now hope will become a standard open architecture for industry implementations. RISC-V was originally developed in the Computer Science Division of the EECS Department at the University of California, Berkeley, but has been made freely available open-source under the BSD license for anyone to use.