
This is the 1st September 2026 digest of SIGARCH Messages.
Call for Participation: PACT 2026
https://pact2026.github.io/index
Submitted by Jie Ren
35th International Conference on Parallel Architectures and Compilation Techniques (PACT 2026)
October 19–22, 2026
Chicago, Illinois, USA
The International Conference on Parallel Architectures and Compilation Techniques (PACT) is a unique technical conference sitting at the intersection of hardware and software, with a special emphasis on parallelism. PACT brings together researchers from computer architecture, compilers, execution environments, programming languages, and applications to present and discuss their latest research results.
PACT 2026 will be held in person at the Illini Center in Chicago, IL, USA. The program features four days of cutting-edge research in parallel architectures, compilation techniques, runtime systems, AI, and high-performance computing, including technical paper presentations, workshops and tutorials (Monday, October 19), and the ACM Student Research Competition. Tutorials are included at no additional fee with either full conference registration or one-day registration for Monday, October 19.
We warmly invite you to join us!
Registration for the conference is now open at:
https://web.cvent.com/event/097fd8c3-ac9c-4f8e-b1b0-42b84ec2f70b/summary
Travel support is available for students and early-career researchers (up to USD $800 for domestic and USD $1,400 for international participants). Application deadline: September 30, 2026. Apply at:
https://docs.google.com/forms/d/e/1FAIpQLSdCwM6T4pcism9Mp3fxMUTUy6iS1dvTKthp-6WN6s0XcR5V4Q/viewform
For those of you requiring a visa, we strongly encourage you to start the process as soon as possible. Visa letters can be requested at:
https://docs.google.com/forms/d/e/1FAIpQLScvj7q57vkiv0YMjfFj_aSfDAH2A4IqtJa6P7UgFq6Q7mXNQQ/viewform
For more details on PACT 2026, including the full program and tutorial offerings, please visit the main conference website at:
https://pact2026.github.io
Call for Papers: Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2027)
https://www.pdp2027.org
Submitted by Rocco Rongo
35th Euromicro Conference on Parallel, Distributed and Network-Based Processing
Barcelona, Catalonia, Spain
17-19 March 2027
PDP stands as a premier European and international conference that comprehensively addresses all facets of parallel and distributed processing. Encompassing a spectrum from foundational theory to practical implementation, it spans systems of all scales—from small configurations to the largest infrastructures. PDP addresses fundamental computational challenges alongside robust applications and delves into architecture, compiler, language, interface design and deployment, tools, support infrastructures, and performance optimization. Parallel, Distributed, and Network-Based Processing fields have evolved significantly, marked by the emergence of novel architectures and groundbreaking applications. Artificial intelligence (AI) has become a major application area, leveraging parallel and distributed technologies to enhance computational efficiency and enable sophisticated AI models. This progress emphasizes the dynamic fusion of parallel and distributed technologies with other rapidly advancing domains. In evaluating these cutting-edge developments, it is imperative to highlight the latest research achievements in established areas of parallel and distributed computing, drawing insights from both industrial and academic perspectives. Accepted papers are published through IEEE Conference Publishing Services (CPS) and submitted for indexing in Scopus and other major indexing services.
Topics of Interest
PDP welcomes original, unpublished work across (but not limited to) the following areas.
Important Dates : All deadlines are firm, AoE times.
Special session proposals due: 31 Aug 2026
Abstract registration deadline: 19 Oct 2026
Submission deadline: 26 Oct 2026
Author notification: 7 Dec 2026
Camera-ready (all tracks): 25 Jan 2027
Conference dates: 17–19 Mar 2027
Special session submission guidelines
Special Sessions proposals should include the following information:
1. A brief description of the specific issues that the special session will address.
2. Contact information of the Special Session chairs, and their competence in the proposed topic(s).
3. A tentative list of Program Committee members.
4. A draft of the Session-specific Call for Papers including tentative calendar.
5. An estimate of the number of expected submissions.
6. For returning Special Sessions, please indicate the number of submissions received in the previous iteration of the session.
7. How the Session is planned to be advertised to receive the expected number of submissions.
Proposals should be sent until 31st August to spataro@unical.it with subject [Special session proposal].
Submission Instructions
Papers report original, unpublished work and are reviewed double-blind. The review process is double-blind and all papers need to be “best-effort” anonymized. We strongly encourage making code and data available anonymously (e.g., in an anonymous GitHub repository via Anonymous GitHub or in a Dropbox folder).
FORMAT: Page limit – Full papers: up to 8 pages.
REVIEW: Double-blind – Remove author names, affiliations, and identifying acknowledgements from the manuscript prior to submission.
PUBLICATION: Proceedings – Accepted papers are published through IEEE CPS and submitted for indexing in Scopus and other major services.
REGISTRATION: Author registration – At least one author of each accepted paper must register with a regular registration and present the paper at the conference.
FORMATTING: Paper templates – All submissions must follow the IEEE Conference Proceedings Format (double-column, 10pt size fonts). LaTeX and Word templates for the IEEE conference format.
Organizers
Institutions:
Universitat Politècnica de Catalunya – BarcelonaTech
Barcelona Supercomputing Center – BSC-CNS
General co-chairs:
Gladys Utrera – Universitat Politècnica de Catalunya
Xavier Martorell – Universitat Politècnica de Catalunya and BCS
Daniel Jiménez-González – Universitat Politècnica de Catalunya
Pau Ferrer Cid – Universitat Politècnica de Catalunya
Call for Papers: International Conference on Field Programmable Technology (FPT 2026)
https://fpt2026.uark.edu/
Submitted by Aman Arora
The International Conference on Field Programmable Technology (FPT)
Honolulu, Hawaii, USA,
Dec 7-10 2026
FTP is a premier conference on field-programmable technologies, reconfigurable computing devices and systems.
PhD Forum and Work-In-Progress Papers at FPT’26 offer great opportunities for students to present their research, communicate with other researchers, get early feedback from experts in the community of field-programmable technology, and experience the atmosphere at an international conference.
We invite short paper submissions (same template/rules as for the main conference) on topics relevant to the FPT community. Papers should be submitted electronically in PDF format, following the IEEE style, and are limited to 4 pages (including references).
Accepted submissions will be accepted for either an oral presentation or a poster-only presentation. One presentation will be selected for the FPT 2026 PhD Forum and WIP Papers Best Presentation Award, to be presented at the conference award ceremony.
Submission deadline
September 8, 2026 (23:59 AoE).
Submission link: https://forms.gle/RSZgjCTovWTpz1sv9
For details, please see: https://fpt2026.uark.edu/call-for-phd-forum/
Organizers
Prof. Aman Arora (aman.kbm@asu.edu)
FPT PhD Forum and WIP Papers chair
Call for Papers: CCMCC 2026: IEEE Cross-Disciplinary Conference on Memory-Centric Computing
https://ccmcc.eclectx.org/cfp.html
Submitted by Saugata Ghose
2nd IEEE Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC 2026)
October 28–30, 2026
Lyon, France
CCMCC is a cross-disciplinary conference that brings experts from diverse fields together, all working on advancing memory-centric computing, including in-memory computing and processing-near-memory. It is a platform for sharing new ideas, exchanging insights, and fostering collaboration. CCMCC’s mission is to accelerate innovation in memory-centric computing and its integration into real-world applications.
Full paper
We are soliciting papers across the entire memory-centric computing stack, from software to architecture to circuits and devices. Authors can choose to submit either a long paper (10–12 pages) or a short paper (4–6 pages). More details on topics of interest, formatting requirements, and submission procedures can be found at https://ccmcc.eclectx.org/cfp.html
Important Dates
Abstracts due June 15;
Full papers due June 22
Extended Abstracts
We are soliciting 2-page extended abstracts from the community on memory-centric computing. Extended abstracts may be based on new and work-in-progress result, submitted or recently published articles. Accepted abstracts will not be published in proceedings, but will be asked to give a short presentation and present a poster at the conference.
A selection of extended abstracts will be invited for the “Highlights of the Year” session, where they will receive a longer presentation slot and have a chance at winning the “CCMCC Seal of Excellence” award.
Submit your abstract at https://ccmcc26.hotcrp.com/ by August 7 (AoE)!
Call for Papers: AgenticOS @ NeurIPS 2026
https://agentic-fmos.github.io/
Submitted by Jishen Zhao
The AgenticOS workshop
co-located with NeurIPS 2026.
Submission deadline: August 29, 2026
Submission link: https://openreview.net/group?id=NeurIPS.cc/2026/Workshop/AgenticOS
Detailed instructions: https://agentic-fmos.github.io/
We invite submissions from ML and Systems communities exploring the following fundamental questions:
Submission types:
References and appendices are not subject to page limits. All submissions must be anonymized for double-blind review.
Call for Papers: VISA @ MICRO 2026
https://visaworkshop.github.io/2026/cfp.html
Submitted by VISA 2026 Organizing Committee
1st Workshop on Virtual ISA for Rapidly Evolving Architectures (VISA 2026)
Co-located with MICRO 2026
October 31, 2026
Athens, Greece
https://visaworkshop.github.io/2026/
VISA 2026 examines the virtual ISA — a stable, hardware-agnostic abstraction between high-level programming models and diverse hardware backends — as the pivotal interface of the agentic era: the contract surface where LLM-driven code synthesizers, autonomous autotuners, compilers, and microarchitectural innovation meet. When the programmer is a machine, the ISA must be self-describing enough to reason over and verifiable enough to trust.
The accelerator landscape is undergoing rapid and continuous transformation. However, this rapid architectural evolution introduces a critical fragmentation problem: each accelerator spawns its own toolchain, compiler backend, and software stack, leading to duplicated engineering effort, poor portability, and steep developer learning curves across targets. Virtual ISA enables compiler reuse across heterogeneous targets, rapid hardware prototyping, software longevity across architectural generations, and composable optimization at the right abstraction level.
Despite this progress, the community lacks a dedicated venue for the cross-cutting challenges of Virtual ISA design, compilation, DSL integration, and co-design — the gap this workshop aims to fill.
We invite short papers (4–6 pages, IEEE format) describing work in progress, position papers, vision papers, or early results. The scope spans the full accelerator stack — ISA design and semantics, compilation and optimization, DSLs and programming models, hardware co-design, and deployment experience.
The agent-facing interface is the flagship theme that runs through all of them: wherever your work sits, we encourage you to ask how the problem changes when the primary reader and writer of the ISA is a machine.
Topics of Interest : https://visaworkshop.github.io/2026/cfp.html
Submission guidelines
Paper length: 4–6 pages using the IEEE conference two-column template.
Paper types: Work-in-progress papers, position papers, vision papers, and early-results papers are welcome.
Reviewing: The review process is single-blind. Author names and affiliations should appear in the submission.
Review process: Every submission will receive at least three reviews. Papers will be evaluated for relevance, originality, soundness, and potential to spark discussion.
Publication: Accepted papers will be presented at the workshop and posted on the VISA 2026 website. The workshop is non-archival, and submission does not preclude later publication at another venue.
Presentation: At least one author of every accepted paper must register for the workshop through MICRO 2026 and present the work.
Submission site: https://visa2026.hotcrp.com/
Important Dates
Paper submission deadline: September 25, 2026, 23:59 AoE
Author notification: October 9, 2026, 23:59 AoE
Camera-ready papers: October 16, 2026, 23:59 AoE
Contact: visa.workshop.chairs@gmail.com
Call for Presentations: SSH-SoC @ ICCAD 2026
https://ssh-soc-workshop.github.io/2026/
Submitted by Biruk Seyoum
3rd edition of Safety and Security in Heterogeneous Open SoC Platforms (SSH-SoC)
co-located with ICCAD 2026
November 8-12, 2026
San Jose, California, USA
A workshop dedicated to trustworthy integration of next-generation heterogeneous systems-on-chip (SoCs) built on open hardware and software platforms.
Technology scaling’s slowdown has pushed computer architecture toward heterogeneous, domain-specific SoCs, accelerated by open hardware and software ecosystems enabling design reuse and rapid prototyping. But as SoC complexity grows, system integration — spanning in-house RTL, HLS-generated blocks, and third-party IP, has become the key bottleneck, introducing security, safety, and performance risks in mission-critical deployments. SSH-SoC provides a venue for methods, tools, and early-stage ideas on trustworthy SoC integration, with a strong emphasis this year on AI-enabled approaches: design-space exploration, verification, and security analysis.
Topics of interest
Workshop Format: SSH-SoC will feature a mix of invited talks (30–45 minute slots from academic and industry experts) and paper presentations selected from submissions to this call. Submissions are 4-page workshop papers (IEEE Conference format); shorter submissions are also welcome. Accepted papers will be presented in 10/15-minute slots, including Q&A. Submissions will be peer-reviewed by the workshop’s Technical Program Committee.
Important Dates:
Organizers:
Call for Presentations: Sys4Health @ SOSP’26
https://events.safari.ethz.ch/sosp26-sys4health/
Submitted by Nika Mansouri Ghiasi
System for Health (Sys4Health) Workshop,
in conjunction with the 32nd Symposium on Operating Systems Principles (SOSP) 2026.
29th September 2026 (Tuesday),
Prague, Czechia
This workshop is part of the Arch4Health initiative and expands the initiative’s scope to different areas of system design for health.
This workshop will focus on:
– Exploring the key computational challenges in health-related applications
– The role of computing system design in addressing them
Submission Guidelines:
This workshop consists of talks on general topics in computing system design for healthcare applications, as well as new trends and bottlenecks in related data-intensive applications. To give a talk in the workshop, please submit an extended abstract (maximum 2 pages) using this link: https://forms.gle/fNLs6BdNYrY7vS8t7
Please refer to our website for more information on submission guidelines and related topics: https://events.safari.ethz.ch/sosp26-sys4health/
Important Dates:
– Abstract Submission Deadline: 28 August 2026
– Notification: 4 September 2026
– Workshop Date: 29 September 2026 (Tuesday)
Organizers:
Nika Mansouri Ghiasi
Konstantina Koliogeorgi
Eirini Tzermpou
Onur Mutlu
Call for Workshops/Tutorials: Vortex Workshop @ MICRO 2026
https://vortexgpgpu.github.io/micro2026.html
Submitted by Shinnung Jeong
2026 Vortex Workshop (in conjunction with Vortex Tutorial)
Sunday, November 1, 2026
Co-located with MICRO 2026
Athens, Greece
Website: https://vortexgpgpu.github.io/micro2026.html
The Vortex Workshop aims to bring together Vortex developers, contributors, and users from academia and industry to discuss Vortex-related research. The Vortex Tutorial will be held in conjunction with the workshop, providing an introduction to Vortex and its use in research and teaching. The workshop will offer an opportunity to share ongoing efforts in Vortex development or research using Vortex, thereby fostering the Vortex and broader open-source GPGPU community.
Topics of interest
Submission Guidelines:
Authors are invited to submit 2-page papers, which must be formatted in accordance with the ACM two-column style. ACM Word or LaTeX style templates are available in https://www.acm.org/publications/proceedings-template
References do not count toward the page limit.
Note: Workshop publications do not preclude publishing at future conference venues.
Submission Link: https://easychair.org/conferences/?conf=vortex26
Important Dates:
Organizing Committee:
General Chair: Hyesoon Kim (Georgia Tech), Blaise Tine (UCLA), Jeff Young (Georgia Tech)
Contact Information:
For more information about the submission on Vortex Workshop, please send email to vortex_submission@groups.gatech.edu.
For general questions about the tutorial or the project, please send email to vortexgpu@cc.gatech.edu, or join our mailing list at https://docs.google.com/forms/d/1r8E-Yo5NwA45Hi3-kEwte4AxK0mBsYDwgjM6Bul4so0/viewform
Please view the SIGARCH website for the latest postings, to submit new posts,
and for general SIGARCH information. We also encourage you to visit the
Computer Architecture Today Blog.
- Adarsh Patil
SIGARCH Content Editor