Call for Papers: PACT 2026
https://pact2026.github.io/submit/
Submitted by Jie Ren

The International Conference on Parallel Architectures and Compilation Techniques (PACT 2026)
Illini Center, Chicago, Illinois, USA
October 19–22, 2026

PACT is a premier forum for research at the intersection of parallel architectures, compilers, runtime systems, and programming models. The conference emphasizes cross-layer design, hardware–software co-design, and rigorous quantitative evaluation of emerging computing systems.

Submission site: https://pact2026.github.io/submit

Important Dates (AoE)

• Abstract submission deadline: April 17, 2026
• Paper submission deadline: April 24, 2026
• Rebuttal Period: July 12–16, 2026
• Author Notification: August 5, 2026
• Artifact submission: August 10, 2026
• Camera-ready papers: October 2, 2026

Topics of Interest
PACT 2026 welcomes high-quality, original research contributions in areas including (but not limited to):

• Parallel architectures (multicore, manycore, heterogeneous systems)
• Accelerator-based and domain-specific architectures
• Memory hierarchies, storage systems, and interconnects
• Optimizing compilers for parallel and heterogeneous platforms
• Runtime systems and task-based programming models
• Auto-tuning and adaptive compilation
• Hardware–software co-design
• Performance modeling, profiling, and debugging
• Energy-efficient and sustainable computing
• Performance
•  portability
• AI/ML systems and large-scale training workloads
• Scientific computing and HPC applications

Submission Guidelines

• Full research papers only
• Maximum 12 pages (excluding references)
• References may extend beyond the page limit
• Must follow official ACM conference format
• Double-blind review process

Submissions must present original work and must not be under simultaneous review elsewhere.

Artifact Evaluation
PACT strongly encourages artifact submission to enhance reproducibility and transparency. Accepted artifacts will receive official ACM artifact badges.

PACT provides a unique venue where architects, compiler researchers, and systems designers collaborate to advance parallel computing across hardware and software layers.
We look forward to your submissions and to an exciting PACT 2026.

PACT 2026 Organizing Committee

Call for Papers: LCTES @ PLDI 2026
https://pldi26.sigplan.org/home/LCTES-2026
Submitted by Seonyeong Heo

27th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2026)
co-located with PLDI 2026
15 – 16 June, 2026
Seoul, South Korea

LCTES provides a link between the programming languages and embedded systems engineering communities. Researchers and developers in these areas are addressing many similar problems but with different backgrounds and approaches. LCTES is intended to expose researchers and developers from either area to relevant work and interesting problems in the other area and provide a forum where they can interact. Research papers on innovative techniques are welcome, as well as experience papers on insights obtained by experimenting with real-world systems and applications.

We enthusiastically look forward to your submissions on programming languages, compilers, tools, theory, and architectures that help in overcoming technical challenges in embedded systems and their emerging applications.

Important Dates:

• Abstract Submission: March 6, 2026 AoE
• Paper Submission: March 13, 2026 AoE
• Conference Dates: June 15–16, 2026 AoE

Paper Categories:

• Full paper: 10 pages presenting original work (at most 2 additional pages for references and appendix)
• Poster, work-in-progress and invited paper: 4 pages papers presenting original ideas that are likely to trigger interesting discussions

Links:

• Call for papers: https://pldi26.sigplan.org/home/LCTES-2026#Call-for-Papers

• Submission site: https://lctes26.hotcrp.com/

Call for Papers: ISMM @ PLDI 2026
https://conf.researchr.org/home/ismm-2026
Submitted by Jung Ho Ahn

ACM SIGPLAN International Symposium on Memory Management (ISMM 2026)
co-located with PLDI 2026
June 15 – June 19, 2026

Paper Categories

The 2026 ACM SIGPLAN International Symposium on Memory Management (ISMM 2026) is soliciting full-length submissions covering new work on all memory management related topics in both software and hardware (and their cooperation), as well as papers presenting confirmations or refutations of important prior results. In addition to regular papers, traditionally submitted to ISMM, we also invite submissions of the following kinds:

• Surveys and comparative analyses that shed new light on previously published techniques.
• Practitioner reports, describing experience with memory management in production. Such papers are not expected to provide novel research contributions, but they should not have been previously published.
• Intellectual abstracts, where researchers share designs, algorithms, or theory that may be interesting to the memory management community, but not yet evaluated.

Topics of Interest

• Garbage collection algorithms and implementations
• Memory allocation and de-allocation
• Memory system design and analysis (both software and hardware)
• Hardware support for memory management
• Memory management for large-scale data-intensive systems
• Memory management at datacenter and cloud scales
• Formal analysis and verification of memory management algorithms
• Compiler analyses to aid memory management
• Tools to analyze memory usage and characteristics of programs
• Empirical analysis of memory intensive programs
• Formal analysis and verification of memory intensive programs
• Memory management for machine learning systems
• Programming and management of emerging or persistent memories
• Caches, memory controllers, memory hierarchies (e.g., CXL) and their management
• Cache coherence and memory consistency
• Processing in memory (including processing near and using memory)
• Memory technology and architecture (SRAM, DRAM, flash, NVM, emerging technologies)
• Security and privacy of memory systems
• Robustness of memory systems
• Low-latency and low-energy memory systems

Submission link: https://ismm26.hotcrp.com

Important Dates

• Submission Deadline: March 27, 2026
• Author Response Period: April 27 – May 1, 2026
• Author Notification: May 4, 2026

Organizers

General Chair: Matthew J. Parkinson (Microsoft Azure Research)
Program Co-chair: Tomoharu Ugawa (University of Tokyo)
Program Co-chair: Jung Ho Ahn (Seoul National University)

Call for Papers: APPT 2026
https://www.appt-conference.com/2026/contribute/call-for-papers
Submitted by Shuang Chen

17th International Symposium on Advanced Parallel Processing Technology (APPT 2026)
July 27-31, 2026
Brussels, Belgium

APPT 2026 primarily focuses on next-generation computing paradigms, new hardware and software platforms for computer systems, and the impact of future intelligent technologies on computer architecture. We invite original contributions spanning theoretical breakthroughs, system-level optimizations, and real-world applications.

Topics of Interest

• Parallel Architectures and Hardware Systems
• Software Foundations for Parallel Computing
• Distributed and Cloud computing
• Parallel Algorithms and Applications
• System Support for Emerging Applications

Important Dates:

• Paper Submission (Abstracts) March 27, 2026
• Paper Submission (Full Paper) April 3, 2026
• Paper Notification May 3, 2026
  

Further submission details available at https://www.appt-conference.com/2026/contribute/call-for-papers

Call for Papers: MICRO 2026
https://www.microarch.org/micro59/
Submitted by Freddy Gabbay

59th IEEE/ACM International Symposium on Microarchitecture (MICRO 2026)
October 31 – November 04, 2026
Athens, Greece

The IEEE/ACM International Symposium on Microarchitecture^® (MICRO) is the premier forum for the presentation and discussion of new ideas in microarchitecture, compilers, hardware/software interfaces, and the design of advanced computing and communication systems. The goal of MICRO is to bring together researchers in microarchitecture, compilers, and systems to foster technical exchange and advance the state of the art.

New for MICRO 2026: In addition to the main research track, MICRO 2026 will feature its inaugural Industry Track, designed to highlight deep technical insights from real-world, production-focused architectural work. The Industry Track has a dedicated call for papers and a tailored review process to better accommodate industry-specific contributions.

Call for Papers: ACM Computing Frontiers 2026
https://www.computingfrontiers.org/2026/
Submitted by Kun Qin (Publicity Chair of CF'26)

23rd ACM International Conference on Computing Frontiers (CF’26)
Catania, Sicily, Italy,
May 19-21

Computing Frontiers (CF) is an eclectic, interdisciplinary, collaborative community of researchers investigating emerging technologies in the broad field of computing: our common goal is to drive the scientific breakthroughs that support society.

CF’s broad scope is driven by recent technological advances in wide-ranging fields impacting computing, such as novel computing models and paradigms, advancements in hardware, network and systems architecture, cloud computing, novel device physics and materials, new application domains of artificial intelligence, big data analytics, wearables, and IoT. The boundaries between the state-of-the-art and revolutionary innovation constitute the advancing frontiers of science, engineering, and information technology — and are the CF community’s focus. CF provides a venue to share, discuss, and advance broad, forward-thinking, early research on the future of computing and welcomes work on a wide spectrum of computer systems, from embedded and hand-held/wearable devices to supercomputers and data centers.

We seek original research contributions at the frontiers of a wide range of topics, including novel computational models and algorithms, new application paradigms, computer architecture (from embedded to HPC systems), computing hardware, memory technologies, networks, storage solutions, compilers, and runtime environments.

This year, CF also features a Special Session on Collaborative Projects addressing the conference’s key topics, including but not limited to those listed below. We invite submissions from collaborative research initiatives funded by agencies worldwide such as the EU, DARPA, IARPA, DOE, ESA, NASA, and others. The goal of this session is to enhance the visibility of ongoing research and development projects and to foster collaboration within the community. It also serves as a platform to discuss future research projects and explore potential partnerships.

Topics of interest

• Hardware Frontiers
  Emerging processor architectures, accelerators and memory systems
  Post-exascale high-performance computing
  Quantum computing systems, runtimes, algorithms and applications
  Post-Moore’s Law Systems: Neuromorphic, biologically-inspired, superconducting, and hyperdimensional computing
• Distributed Systems and Networking Frontiers
  Multi and Hybrid Cloud computing, and challenges
  IoT, CPS, edge and embedded computing systems
  Breakthroughs in edge-cloud continuum, satellite computing
  Sensor networks and wearable computing
• System Software and Runtime Frontiers
  Virtualization and containerization
  Platforms for workflows and distributed programming
  Compilers and optimizations for heterogeneous systems
  Big data platforms and analytics
• AI for Systems and Systems for AI
  Distributed AI and federated learning
  System design for efficient AI
  AI for system optimizations
  Agentic AI and AIOps
• Cutting-edge Developments in Computing for Society and Emerging Applications
  AI ethics: Privacy, sustainability, biases
  Emerging applications in education, health, smart cities and emerging markets
• Pushing the Boundaries of Cross-cutting Computing Challenges
  Designing for scale and performance
  Energy efficiency and sustainability
  Security and privacy, impact of quantum and AI
  Reliability, resiliency and dependability
  Algorithmic innovations
  Benchmarking, performance analysis and modeling

We strongly encourage submissions in other emerging fields of computing, and welcome submissions that propose new directions of research and out-of-the-box solutions for grand computing challenges. If you are in doubt whether your work fits Computing Frontiers, please contact the program co-chairs.

Important Dates

• Abstract submission deadline:      January 12, 2026
• Paper submission deadline:   January 19, 2026
• Author notification: March 9, 2026
• Camera-ready version due:    April 6, 2026

Organizers
General Chair

• Hubertus Franke, IBM Research, US
• Maurizio Palesi, University of Catania, IT

Program Chairs

• Rubén Salvador, CentraleSupélec, IRISA, Inria, FR
• Estela Suarez, Jülich Supercomputing Centre & University of Bonn, DE

Call for Papers: ESWeek 2026
https://esweek.org/
Submitted by Asif Ali Khan, TU Dresden, Germany

IEEE/ACM EMBEDDED SYSTEMS WEEK 2026
Barcelona, Spain, October 4 – October 9, 2026

Home

IEEE/ACM Embedded Systems Week (ESWEEK) is the premier event covering all aspects of hardware and software design for intelligent, connected embedded, edge, and cyber-physical systems. ESWEEK brings together three leading international conferences (CASES, CODES, EMSOFT), one symposium (MEMOCODE), and several workshops and tutorials, enabling attendees to explore the state of the art in embedded systems research and development. One registration enables participation across CASES, CODES, and EMSOFT, while tutorials, symposia, and workshops may require separate registration.

Call for Papers: CASES, CODES, EMSOFT, MEMOCODE
Call for Proposals: Workshops, Tutorials, Educations, Special Sessions

Important Dates
Journal Track
– Abstract Submission: March 23, 2026
– Full Paper Submission: March 30, 2026
– Notification of Acceptance: July 17, 2026

Late-Breaking & Work-in-Progress Track
– Paper Submission: June 5, 2026
– Notification of Acceptance: July 17, 2026

Workshops, Tutorials, Education Classes & Special Session Proposals
– Submission Deadline: March 30, 2026

Publication Model & Review Process
ESWEEK has a Journal-integrated publication model. Full papers accepted in one of the three conferences (CASES, CODES and EMSOFT) will be published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Late-breaking results will be published in IEEE Embedded Systems Letters (ESL). More details on the submission guidelines and authors/review details can be found on https://esweek.org/author-information/

Conferences & Symposium

• CASES: IEEE/ACM International Conference on Compilers, Architectures, and Synthesis for Embedded Systems
  https://esweek.org/cases/
  Program Chairs:
  – Christophe Dubach (McGill University, CAN)
  – Chia-Lin Yang (National Taiwan University, TW)
• CODES: IEEE/ACM International Conference on Co-Design of Embedded Systems
  https://esweek.org/codes-isss/
  Program Chairs:
  – Paul Bogdan (University of Southern California, US)
  – Yuan-Hao Chang (National Taiwan University, TW)
• EMSOFT: IEEE/ACM International Conference on Embedded Software
  https://esweek.org/emsoft/
  Program Chairs:
  – Borzoo Bonakdarpour (Michigan State University, US)
  – Li-Pin Chang (National Yang Ming Chiao Tung University, TW)
• MEMOCODE: IEEE/ACM International Symposium On Formal Methods and Models for System Design
  https://esweek.org/memocode/
  Program Chairs:
  – Yamine Ait Ameur (University of Toulouse, France)
  – Nathan Allen (Auckland University of Technology, NZ)

Details on the call for proposals for co-located Workshops, Tutorials, Education Classes and Special Session can be found on the conference website.

Organizers
General Chairs:
– Andy D. Pimentel (University of Amsterdam, NL)
– Mohammad Al Faruque (UC Irvine, US)

Conference & Local Arrangement Chair:
– Francisco J. Cazorla (Barcelona Supercomputing Center, ES)

We look forward to receiving your submissions and to seeing you in Barcelona!

Call for Papers: GLSVLSI 2026
https://www.glsvlsi.org
Submitted by Jianyi Cheng

36^th edition of Great Lakes Symposium on VLSI (GLSVLSI 2026)
Finger Lakes region in New York.
June 22 – June 24, 2026
http://www.glsvlsi.org/

Topics of Interest

• VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal circuits, NoC, SoC, IO & interconnects, memories, lab-on-a-chip, biomedical sensors and devices, circuits for wearable or robotic devices, VLSI design and optimization.
• VLSI for Artificial Intelligence (AI): hardware AI accelerators, novel circuit and architectures for machine learning & AI, brain-inspired and neuromorphic computing hardware, compute-in-memory design.
• IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems; machine learning for IoT; robots; wearable device and system; network & communication system.
• Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), timing analysis, signal and power integrity, machine learning and AI for CAD and EDA.
• Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-resilient design, learning-assisted testing.
• Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, post CMOS VLSI.
• Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, side-channel attack/defense, CPS/IoT security, AI for HW security, hardware for classical and post-quantum cryptography.

Important Dates
Paper submission deadline:     March 2nd, 2026 (11:59 pm EST)
Acceptance Notification:     April 30, 2026
Camera-Ready:     May 15, 2026

Submission guidelines, paper format and other information can be found at https://www.glsvlsi.org

Call for Papers: 2nd IEEE International Conference on LLM-Aided Design (LAD 2026)
https://iclad.ai
Submitted by Jeff Goeders

The 2026 IEEE International Conference on LLM-Aided Design (LAD) will focus on how to use LLM (Large Language Model) technology to help design circuits, software, and computing systems with improved quality, productivity, robustness, and cost. It is the first international conference dedicated to this topic, aiming to showcase results that leverage generative-AI advances and provide methods and solutions for design automation, software development, and other fields. The conference will host leading researchers, present open-source LLM models, datasets, tool flows, and offer benchmarking, testing, and validation methods.

Topics of Interest
The main theme of LAD this year will revolve around agentic optimization and scaling inference-time methods, but we welcome a broad range of topics on new methodologies, tools, datasets, and benchmarks pertaining to:

• Agentic workflows for design automation and optimization
• LLM inference-time techniques for design 
• LLM-aided HW/SW design, code generation, and test plan generation
• System-level design methodology development with LLMs
• Finetuning of large foundation models for specialization in design automation
• New datasets and benchmarks of relevance to LLM-aided design
• Evaluation and verification of LLM-aided designs
• LLM-aided design for software development, IT automation, site reliability, and regulatory compliance. 
• LLMs for EDA, including RTL, HLS, physical design, and EDA scripting
• LLMs for reasoning and logic used in design process 
• Computational efficiency of LLM-aided design tools
• Data science and data analytics for LLM-aided design
• Security of LLM-generated designs
• Privacy, copyright, and other regulatory concerns around LLM-aided design
• LLM-aided bug-fixing
• LLM-aided design for various application domains, such as 3D manufacturing, material or drug discovery, sustainability, cybersecurity, etc. 
• LLM-aided design for emerging technologies, such as quantum computing, neuromorphic computing, and electro-optic co-design

Important Dates
Abstract Submission:    Mar 2nd, 2026 (AoE)
Notif. of Acceptance:   May 12th, 2026 (AoE)
Full Paper Submission: Mar 9th, 2026 (AoE)
Camera ready paper:  Jun 6th, 2026    (AoE)

See the conference website (https://iclad.ai/) for submission instructions.

Organizers
General Chairs: Azaliza Mirhosseini (Stanford), Yong Liu (Cadence)
Program Chairs: JV Rajendran (TAMU), Cong Hao (GaTech), Jimmy Cheng (Synopsys)