SIGARCH

This is the 1st October 2026 digest of SIGARCH Messages.

In This Issue


Call for Papers: Euromicro Conference on Parallel, Distributed and Network-Based Processing (PDP 2027)
https://www.pdp2027.org
Submitted by Rocco Rongo

35th Euromicro Conference on Parallel, Distributed and Network-Based Processing
Barcelona, Catalonia, Spain
17-19 March 2027

PDP stands as a premier European and international conference that comprehensively addresses all facets of parallel and distributed processing. Encompassing a spectrum from foundational theory to practical implementation, it spans systems of all scales—from small configurations to the largest infrastructures. PDP addresses fundamental computational challenges alongside robust applications and delves into  architecture, compiler, language, interface design and deployment, tools, support infrastructures, and performance optimization. Parallel, Distributed, and Network-Based Processing fields have evolved significantly, marked by the emergence of novel architectures and  groundbreaking applications. Artificial intelligence (AI) has become a major application area, leveraging parallel and distributed technologies to enhance computational efficiency and enable sophisticated AI models.  This progress emphasizes the dynamic fusion of parallel and distributed technologies with other rapidly advancing domains. In evaluating these cutting-edge developments, it is imperative to highlight the latest research achievements in established areas of parallel and distributed computing, drawing insights from both industrial and academic perspectives. Accepted papers are published through IEEE Conference Publishing Services (CPS) and submitted for indexing in Scopus and other major indexing services.

Topics of Interest
PDP welcomes original, unpublished work across (but not limited to) the following areas.

  • Algorithms :  Resource-aware & power-efficient algorithms; real-time and fault-tolerant distributed/parallel algorithms; graph and network algorithms.
  • – Applications: Numerical and scientific applications with multi-level parallelism; computations over irregular domains.
  • Data-centric processing: Scientific workflows; large-scale data processing & management; next-generation storage; FAIR/open data systems.
  • Distributed AI: Federated and distributed learning; AI at scale; training of LLMs; benchmarking for AI workloads.
  • Distributed computing: Cluster, grid, fog/edge, mobile and cloud systems; service-oriented processing; cost, security & energy models.
  • Parallel computing: Accelerator-based systems (GPU, FPGA, neuromorphic, post-CMOS); embedded parallel systems; fault tolerance.
  • Programming models & tools: Languages, compilers, middleware and OS; libraries, runtime and systems software; performance prediction.
  • HPC state of practice: Managing systems, storage & facilities; HPC in the cloud; networking and cybersecurity; training strategies.
  • Systems & architectures: High-throughput & streaming architectures; heterogeneous and hybrid systems; post-CMOS architectures.

Important Dates : All deadlines are firm, AoE times.
Special session proposals due: 31 Aug 2026

Abstract registration deadline: 19 Oct 2026
Submission deadline: 26 Oct 2026
Author notification: 7 Dec 2026
Camera-ready (all tracks): 25 Jan 2027
Conference dates: 17–19 Mar 2027

Special session submission guidelines
Special Sessions proposals should include the following information:

1. A brief description of the specific issues that the special session will address.
2. Contact information of the Special Session chairs, and their competence in the proposed topic(s).
3. A tentative list of Program Committee members.
4. A draft of the Session-specific Call for Papers including tentative calendar.
5. An estimate of the number of expected submissions.
6. For returning Special Sessions, please indicate the number of submissions received in the previous iteration of the session.
7. How the Session is planned to be advertised to receive the expected number of submissions.

Proposals should be sent until 31st August to spataro@unical.it with subject [Special session proposal].

Submission Instructions
Papers report original, unpublished work and are reviewed double-blind. The review process is double-blind and all papers need to be “best-effort” anonymized. We strongly encourage making code and data available anonymously (e.g., in an anonymous GitHub repository via Anonymous  GitHub or in a Dropbox folder).

FORMAT: Page limit – Full papers: up to 8 pages.
REVIEW: Double-blind – Remove author names, affiliations, and identifying acknowledgements from the manuscript prior to submission.
PUBLICATION: Proceedings – Accepted papers are published through IEEE CPS and submitted for indexing in Scopus and other major services.
REGISTRATION: Author registration – At least one author of each accepted paper must register with a regular registration and present the paper at the conference.
FORMATTING: Paper templates – All submissions must follow the IEEE Conference Proceedings Format (double-column, 10pt size fonts). LaTeX and Word templates for the IEEE conference format.

Organizers
Institutions:
Universitat Politècnica de Catalunya – BarcelonaTech
Barcelona Supercomputing Center – BSC-CNS

General co-chairs:
Gladys Utrera – Universitat Politècnica de Catalunya
Xavier Martorell – Universitat Politècnica de Catalunya and BCS
Daniel Jiménez-González – Universitat Politècnica de Catalunya
Pau Ferrer Cid – Universitat Politècnica de Catalunya

 

 

 

 

 

 

 

 


Call for Papers: International Conference on Field Programmable Technology (FPT 2026)
https://fpt2026.uark.edu/
Submitted by Aman Arora

The International Conference on Field Programmable Technology (FPT)
Honolulu, Hawaii, USA,
Dec 7-10 2026

FTP is a premier conference on field-programmable technologies, reconfigurable computing devices and systems.
PhD Forum and Work-In-Progress Papers at FPT’26 offer great opportunities for students to present their research, communicate with other researchers, get early feedback from experts in the community of field-programmable technology, and experience the atmosphere at an international conference.

We invite short paper submissions (same template/rules as for the main conference) on topics relevant to the FPT community. Papers should be submitted electronically in PDF format, following the IEEE style, and are limited to 4 pages (including references).
Accepted submissions will be accepted for either an oral presentation or a poster-only presentation. One presentation will be selected for the FPT 2026 PhD Forum and WIP Papers Best Presentation Award, to be presented at the conference award ceremony.

Submission deadline
September 8, 2026 (23:59 AoE).
Submission link: https://forms.gle/RSZgjCTovWTpz1sv9

For details, please see: https://fpt2026.uark.edu/call-for-phd-forum/

Organizers
Prof. Aman Arora (aman.kbm@asu.edu)
FPT PhD Forum and WIP Papers chair


Call for Papers: AgenticOS @ NeurIPS 2026
https://agentic-fmos.github.io/
Submitted by Jishen Zhao

The AgenticOS workshop
co-located with NeurIPS 2026.

Submission deadline: August 29, 2026

Submission link: https://openreview.net/group?id=NeurIPS.cc/2026/Workshop/AgenticOS

Detailed instructions: https://agentic-fmos.github.io/

We invite submissions from ML and Systems communities exploring the following fundamental questions:

  1. Should foundation models be trained differently to serve as system components?
  2. What are the minimal abstractions for building agentic systems?
  3. How should agentic memory representations, policies, and cross-layer optimizations be designed?
  4. How can agentic workloads be optimized across system layers?
  5. How should models be routed and composed under uncertainty?
  6. How should long-horizon agentic systems be designed?
  7. How can constrained self-evolution preserve safety, reproducibility, and governance?
  8. How should agentic systems be evaluated?

Submission types:

  1. Extended Abstracts (up to 2 pages): Extended abstracts may present visionary ideas, AgenticOS abstractions, or position papers that can spark interesting discussions on the workshop theme.
  2. Regular Papers (up to 6 pages): Regular papers should present original research, systems experience, empirical analyses, or deployment studies relevant to the workshop themes.

References and appendices are not subject to page limits.  All submissions must be anonymized for double-blind review.


Call for Papers: VISA @ MICRO 2026
https://visaworkshop.github.io/2026/cfp.html
Submitted by VISA 2026 Organizing Committee

1st Workshop on Virtual ISA for Rapidly Evolving Architectures (VISA 2026)
Co-located with MICRO 2026
October 31, 2026
Athens, Greece
https://visaworkshop.github.io/2026/

VISA 2026 examines the virtual ISA — a stable, hardware-agnostic abstraction between high-level programming models and diverse hardware backends — as the pivotal interface of the agentic era: the contract surface where LLM-driven code synthesizers, autonomous autotuners, compilers, and microarchitectural innovation meet. When the programmer is a machine, the ISA must be self-describing enough to reason over and verifiable enough to trust.
The accelerator landscape is undergoing rapid and continuous transformation. However, this rapid architectural evolution introduces a critical fragmentation problem: each accelerator spawns its own toolchain, compiler backend, and software stack, leading to duplicated engineering effort, poor portability, and steep developer learning curves across targets. Virtual ISA enables compiler reuse across heterogeneous targets, rapid hardware prototyping, software longevity across architectural generations, and composable optimization at the right abstraction level.
Despite this progress, the community lacks a dedicated venue for the cross-cutting challenges of Virtual ISA design, compilation, DSL integration, and co-design — the gap this workshop aims to fill.

We invite short papers (4–6 pages, IEEE format) describing work in progress, position papers, vision papers, or early results. The scope spans the full accelerator stack — ISA design and semantics, compilation and optimization, DSLs and programming models, hardware co-design, and deployment experience.

The agent-facing interface is the flagship theme that runs through all of them: wherever your work sits, we encourage you to ask how the problem changes when the primary reader and writer of the ISA is a machine.

Topics of Interest : https://visaworkshop.github.io/2026/cfp.html

  • Agent-Facing Virtual ISA Interfaces
  • Virtual ISA Design and Abstraction
  • Virtual ISA and Architecture Co-design
  • Compiler Optimizations
  • DSLs and Programming Models
  • Case Studies and Infrastructure

Submission guidelines
Paper length: 4–6 pages using the IEEE conference two-column template.
Paper types: Work-in-progress papers, position papers, vision papers, and early-results papers are welcome.
Reviewing: The review process is single-blind. Author names and affiliations should appear in the submission.
Review process: Every submission will receive at least three reviews. Papers will be evaluated for relevance, originality, soundness, and potential to spark discussion.
Publication: Accepted papers will be presented at the workshop and posted on the VISA 2026 website. The workshop is non-archival, and submission does not preclude later publication at another venue.
Presentation: At least one author of every accepted paper must register for the workshop through MICRO 2026 and present the work.

Submission site: https://visa2026.hotcrp.com/

Important Dates

Paper submission  deadline: September 25, 2026, 23:59 AoE
Author notification: October 9, 2026, 23:59 AoE
Camera-ready papers: October 16, 2026, 23:59 AoE

Contact: visa.workshop.chairs@gmail.com


Call for Workshops/Tutorials: Vortex Workshop @ MICRO 2026
https://vortexgpgpu.github.io/micro2026.html
Submitted by Shinnung Jeong

2026 Vortex Workshop (in conjunction with Vortex Tutorial)
Sunday, November 1, 2026
Co-located with MICRO 2026
Athens, Greece

Website: https://vortexgpgpu.github.io/micro2026.html

The Vortex Workshop aims to bring together Vortex developers, contributors, and users from academia and industry to discuss Vortex-related research. The Vortex Tutorial will be held in conjunction with the workshop, providing an introduction to Vortex and its use in research and teaching. The workshop will offer an opportunity to share ongoing efforts in Vortex development or research using Vortex, thereby fostering the Vortex and broader open-source GPGPU community.

Topics of interest

  • Design and implementation of Vortex GPGPU
  • OpenCL/CUDA running on Vortex
  • Compiler optimizations for Vortex
  • Memory hierarchy and management in Vortex GPGPU
  • Tensor cores, sparse units, and other domain-specialized units
  • Machine learning, graphics, and neural rendering on Vortex
  • Benchmarking and performance evaluation
  • Applications and case studies using Vortex
  • Security, reliability, and fault tolerance in GPGPU architecture
  • Comparison of Vortex with other GPGPU architectures
  • FPGA/ASIC implementation of Vortex

Submission Guidelines:
Authors are invited to submit 2-page papers, which must be formatted in accordance with the ACM two-column style. ACM Word or LaTeX style templates are available in https://www.acm.org/publications/proceedings-template
References do not count toward the page limit.
Note: Workshop publications do not preclude publishing at future conference venues.

Submission Link: https://easychair.org/conferences/?conf=vortex26

Important Dates:

  • Paper submission deadline: September 6th, 2026, 23:59 AoE
  • Author notification: September 27th, 2026
  • Workshop date: November 1st, 2026

Organizing Committee:
General Chair: Hyesoon Kim (Georgia Tech), Blaise Tine (UCLA), Jeff Young (Georgia Tech)

Contact Information:
For more information about the submission on Vortex Workshop, please send email to vortex_submission@groups.gatech.edu.
For general questions about the tutorial or the project, please send email to vortexgpu@cc.gatech.edu, or join our mailing list at https://docs.google.com/forms/d/1r8E-Yo5NwA45Hi3-kEwte4AxK0mBsYDwgjM6Bul4so0/viewform


Please view the SIGARCH website for the latest postings, to submit new posts, and for general SIGARCH information. We also encourage you to visit the Computer Architecture Today Blog.

- Adarsh Patil
SIGARCH Content Editor

Top