Call for Papers: PAW-ATM: Parallel Applications Workshop, Alternatives To MPI+X
http://sourceryinstitute.github.io/PAW/
Submitted by Karla Morris

• Novel application development using high-level parallel programming languages and frameworks.
• Examples that demonstrate performance, compiler optimization, error checking, and reduced software complexity.
• Applications from artificial intelligence, data analytics, bioinformatics, and other novel areas.
• Performance evaluation of applications developed using alternatives to MPI+X and comparisons to standard programming models.
• Novel algorithms enabled by high-level parallel abstractions.
• Experience with the use of new compilers and runtime environments.
• Libraries using or supporting alternatives to MPI+X.
• Benefits of hardware abstraction and data locality on algorithm implementation.

1. Full-length papers presenting novel research results: Full-length papers will be published in the workshop proceedings. Submitted papers must describe original work that has not appeared in, nor is under consideration for, another conference or journal. Papers shall be eight (8) pages minimum and not exceed ten (10) including text, appendices, and figures.
2. Extended abstracts summarizing preliminary/published results: Extended abstracts will be evaluated separately and will not be included in the published proceedings; they are intended to propose timely communications of novel work that will be formally submitted elsewhere at a later stage, and/or of already published work that would be of interest to the PAW-ATM audience in terms of topic and timeliness.  Extended abstracts shall not exceed four (4) pages.
3. Pictures or videos showcasing results from parallel applications: In addition to the manuscript submissions categories described above, authors have the option to submit pictures or videos of the results obtained with their parallel applications. This submission category should include pictures or video files and 250 words abstract, describing the application. These will be considered for PAW-ATM Best Visual Effects Award.

• Karla Morris – Sandia National Laboratories

• Irene Moulitsas – Cranfield University
• Elliott Slaughter – SLAC National Accelerator Laboratory
• Michael Ferguson – Hewlett Packard Enterprise

• Bill Long – Hewlett Packard Enterprise
• Daniele Lezzi – Barcelona Supercomputing Center

• David Bunde – Knox College
• Barbara Chapman – Hewlett Packard Enterprise and Stony Brook University
• Lúcia María de Assumpcao Drummond – Universidade Federal Fluminense
• Sally Ellingson – University of Kentucky
• Michael Ferguson – Hewlett Packard Enterprise
• Salvatore Filippone – Università di Roma Tor Vergata
• Dounia Khaldi – Intel
• Eric Laurendeau – Polytechnique Montreal
• Daniele Lezzi – Barcelona Supercomputing Center
• Laércio Lima Pilla – National Center for Scientific Research and University of Bordeaux
• Bill Long – Hewlett Packard Enterprise
• Francesc Lordan – Barcelona Supercomputing Center
• Esteban Meneses Rojas – National High Technology Center
• Karla Morris – Sandia National Laboratories
• Irene Moulitsas – Cranfield University
• Swaroop S. Pophale – Oak Ridge National Laboratory
• Mitsuhisa Sato – RIKEN Advanced Institute for Computational Science
• Christine Sweeney – Los Alamos National Laboratory
• Elliott Slaughter – SLAC National Accelerator Laboratory
• Kenjiro Taura – University of Tokyo
• Sean Treichler – NVIDIA
• Richard W Vuduc – Georgia Institute of Technology

• Bradford L. Chamberlain – Hewlett Packard Enterprise
• Damian W. I. Rouson – Sourcery Institute
• Katherine A. Yelick – Lawrence Berkeley National Laboratory

• Submissions deadline: July 29, 2022
• Manuscripts review period: August 8-25, 2022 (including Rebuttal)
• Rebuttal submission: August 26, 2022
• Building consensus: August 29 – September 2, 2022
• Notification to authors: September 9, 2022
• Final program: September 30, 2022
• Camera-ready papers due from authors: October 1, 2022
• PAW-ATM Workshop at SC22: November 13-18, 2022

Call for Papers: HotSpots Strike Back Workshop at ISCA
https://sites.tufts.edu/tcal/hssb-hotspots-strike-back/
Submitted by Mark Hempstead

HSSB: HotSpots Strike Back: Call For Papers
June 19th, 2022 New York City
At ISCA 2022: https://iscaconf.org/isca2022/ 
https://sites.tufts.edu/tcal/hssb-hotspots-strike-back/ 

On-chip thermal hotspots are becoming one of the primary design concerns for next-generation processors. Industry chip design trends coupled with post-Dennard power density have led to a stark increase in localized and application-dependent hotspots. These “advanced” hotspots cause a variety of adverse effects if untreated, ranging from dramatic performance loss, incorrect circuit operation, and reduced device lifespan. In the past, hotspots could be addressed with physical cooling systems and EDA tools; however, the severity of advanced hotspots is prohibitively high for conventional thermal regulation techniques alone. Cross stack approaches that incorporate device, circuit, packaging, cooling, architecture, and software are needed.

HSSB: HotSpots Strike Back: seeks papers that study next-generation advanced on-chip thermal hotspots. Position papers and work-in-progress papers are encouraged. The organizers are interested in presenting a diversity of fields and approaches to thermal on-chip hotspots. 

List of Potential Topics

• Packaging and system cooling approaches to hotspot mitigation
• Data and retrospective studies characterizing hotspot behavior in simulation or silicon
• Device, circuit, architecture studies that illustrate the challenges of hotspots and their impact on chip’s performance, cost, and reliability 
• Tools (at the transistor, chip, package, and system abstractions) that characterize or model hotspot behavior
• Hotspot aware predictions or mitigations at the circuit, architecture, or software level
• Design automation (EDA) approaches to hotspot prediction and mitigation

Submission and Presentation Format

An abstract of at most 2 pages should be submitted that describes the problem, the study or the design to be presented at the workshop. The presentation format will include a 15-30 minute presentation. In addition, all speakers will be invited to join a panel discussion at the end of their session where questions from the audience and debate among panelists will be encouraged. 

Submit your abstract hereL https://sites.tufts.edu/tcal/hssb-hotspots-strike-back/ 

Important Dates

Submission Due Date: May 1, 2022
Author Notification: May 8, 2022
Final Abstract Due Date: May 29, 2022
Workshop: Sunday, June 19th (morning session)

Workshop Organizers

• Mark Hempstead (Tufts University)
• Alexander Hankin (Harvard University / Tufts University)
• Julien Sebot (Intel)
• Kaushik Vaidyanathan (Google)
• David Werner (Tufts University)

Call for Papers: Workshop on Accelerated Machine Learning (AccML) at HiPEAC 2022
https://accml.dcs.gla.ac.uk/
Submitted by José Cano

4th Workshop on Accelerated Machine Learning (AccML)
Co-located with the HiPEAC 2022 Conference
(https://www.hipeac.net/2022/budapest/)
June 22, 2022
Budapest, Hungary

The remarkable performance achieved in a variety of application areas (natural language processing, computer vision, games, etc.) has led to the emergence of heterogeneous architectures to accelerate machine learning workloads. In parallel, production deployment, model complexity and diversity pushed for higher productivity systems, more powerful programming abstractions, software and system architectures, dedicated runtime systems and numerical libraries, deployment and analysis tools. Deep learning models are generally memory and computationally intensive, for both training and inference. Accelerating these operations has obvious advantages, first by reducing the energy consumption (e.g. in data centers), and secondly, making these models usable on smaller devices at the edge of the Internet. In addition, while convolutional neural networks have motivated much of this effort, numerous applications and models involve a wider variety of operations, network architectures, and data processing. These applications and models permanently challenge computer architecture, the system stack, and programming abstractions. The high level of interest in these areas calls for a dedicated forum to discuss emerging acceleration techniques and computation paradigms for machine learning algorithms, as well as the applications of machine learning to the construction of such systems.

Organizers: https://accml.dcs.gla.ac.uk/
HiPEAC: https://www.hipeac.net/2022/budapest/#/program/sessions/7919/

Topics of interest include (but are not limited to):

• Novel ML systems: heterogeneous multi/many-core systems, GPUs, FPGAs;
• Software ML acceleration: languages, primitives, libraries, compilers and frameworks;
• Novel ML hardware accelerators and associated software;
• Emerging semiconductor technologies with applications to ML hardware acceleration;
• ML for the construction and tuning of systems;
• Cloud and edge ML computing: hardware and software to accelerate training and inference;
• Computing systems research addressing the privacy and security of ML-dominated systems.

Submissions
Papers will be reviewed by the workshop’s technical program committee according to criteria regarding the submission’s quality, relevance to the workshop’s topics, and, foremost, its potential to spark discussions about directions, insights, and solutions in the context of accelerating machine learning. Research papers, case studies, and position papers are all welcome.

In particular, we encourage authors to submit work-in-progress papers: To facilitate sharing of thought-provoking ideas and high-potential though preliminary research, authors are welcome to make submissions describing early-stage, in-progress, and/or exploratory work in order to elicit feedback, discover collaboration opportunities, and spark productive discussions.

Important Dates
Submission deadline: April 15, 2022
Notification of decision: April 30, 202

Organizers
José Cano (University of Glasgow)
Valentin Radu (University of Sheffield)
José L. Abellán (Catholic University of Murcia)
Marco Cornero (DeepMind)
Albert Cohen (Google)
Dominik Grewe (DeepMind)

Call for Papers: Accelerator Architecture in Computational Biology and Bioinformatics Workshop (AACBB-2022)
https://aacbb-workshop.github.io/
Submitted by Leonid Yavits

PLEASE NOTE THE NEW DATE, FOLLOWING THE DELAY OF ISCA-2022 BY A WEEK
4th Accelerator Architecture in Computational Biology and Bioinformatics workshop (AACBB-2022)
June 18th 2022
In conjunction with 49th IEEE International Symposium on Computer Architecture
New York City, New York, USA

Workshop website: https://aacbb-workshop.github.io/

Important dates
Submission link: https://easychair.org/conferences/?conf=aacbb2022
Submission deadline: April 20, 2022, EoD AoE
Notifications: May 5, 2022

Over the last decade, the advent of high-throughput sequencing techniques brought an exponential growth in sequenced data.At the same time, the single-thread performance continued to improve by only a few percent point annually. The growing gap between the performance demand to performance supply became a significant challenge in the path to scientific discovery. The computational bottleneck of genome analysis pipelines became even more apparent during the ongoing Covid-19 pandemic, where fast and reliable virus detection and classification tools have been critical for the worldwide genomic surveillance system.

The gap between the performance of a conventional computer architecture and the biological data processing requirements is growing. For example, assembling a human genome from 3rd generation sequenced data may require hundreds of CPU hours. Hence, computational biology and bioinformatics will have to rely on hardware accelerators to allow processing to keep up with the exploding amount of sequenced data.

In a typical application, the dominant portion of the runtime is spent in a small number of computational kernels, making it an excellent target for hardware acceleration. The combination of increasingly large datasets and high performance computing requirements make computational biology a prime candidate to benefit from accelerator architecture research. Potential directions include 3D integration, near-data processing, in-data processing and reconfigurable architectures.

This workshop will focus on architecture and design of hardware accelerators for computational biology and bioinformatics problems. We plan to present and discuss a variety of acceleration techniques, accelerator architectures and their implications on the development of computational biology. This year, we plan to extend the industry angle, by providing a keynote and invited talks from leading industry research specialists.

List of Topics
This workshop focuses on architecture and design of hardware and software accelerators for computational biology and bioinformatics problems. Topics of interest include, but are not limited to the following:

Hardware and software algorithms/applications in the fields of computational biology, such as (but not limited to):

• Bioinformatics
• Genomics
• Proteomics
• Protein structure prediction
• Covid-19 pandemic

Bioinformatics and computational biology accelerator architecture and design based on (but not limited to):

• 3D memory-logic stack
• Near-data (in-memory) processing
• In-data processing
• FPGAs
• Reconfigurable architectures
• Emerging memory technologies and their impact on bioinformatics and computational biology
• Impact of bioinformatics and biology applications on computer architecture research
• Bioinformatics and computational biology-inspired hardware/software trade-offs

Keynote Speakers

• Tajana Rosing, Prof of Computer Science and Engineering, director of System Energy Efficiency Lab, UCSD
• Onur Mutlu, Prof of Computer Science, Zurich ETH and CMU

Committees

Program Committee

• Ananth Kalyanaraman, WSU
• Can Alkan, Bilkent University
• Engin Ipek, University of Rochester
• Jason Cong, UCLA
• Mattan Erez, UT Austin
• Mircea Stan, UVA
• Onur Mutlu, ETH/CMU
• Ran Ginosar, Technion
• Ronnie Ronen, Technion
• Yuan Xie, UCSB

Organizing committee

• Leonid Yavits* (leonid.yavits@gmail.com)
• Yatish Turakhia^ (yturakhia@eng.ucsd.edu)

* Department of Engineering, Bar Ilan University
^ Department of Electrical and Computer Engineering, University of California, San Diego

Important Notes
Presenting a paper in the workshop does not preclude publication in other venues

Contact
All questions about submissions should be emailed to Leonid Yavits (leonid.yavits@gmail.com)