This is the 1st May 2022 digest of SIGARCH Messages.
Call for Participation: ISA to ILA: Tutorial at ISCA 2022
https://princetonuniversity.github.io/isca22-ila-tutorial/
Submitted by Sharad Malik
Generalizing the ISA to the ILA
A Software/Hardware Interface for Accelerator-rich Platforms
Overview
The Instruction-Set Architecture (ISA) has long served as the software/hardware interface for programmable processors. The ISA simultaneously serves as a specification for the hardware implementation and as an abstraction of the hardware for software development. Over the years, this interface has enabled independent development of the hardware and software. This has enabled ISA-compliant hardware upgrades and portability of software applications. With the advent of multiprocessors, the memory consistency model (MCM) provided the software/hardware interface for processor interactions through shared memory. As with the ISA, the MCM serves both as the specification for the hardware and its abstraction for software. We are now in an era where accelerator-rich platforms are widely used to deliver the power-performance requirements of emerging applications. Unfortunately, there is no widely accepted software/hardware interface for these platforms – this has implications for both hardware and software development. The accelerator specifications are typically informal, with the possible availability of executable reference models (C/C++/SystemC). The software development largely depends on APIs providing platform-specific hardware functions calls for utilizing the hardware specialization – similar to how peripheral devices are accessed. This results in software that is not portable across platforms or optimizable using standard compiler flows.
The recently developed Instruction-Level Abstraction (ILA) provides a software/hardware interface that generalizes the notion of ISAs to accelerators. The ILA model of an accelerator is a functional model that defines the response of the accelerator to commands at its interface. These commands serve as “instructions” for the accelerator. These commands are generally memory-mapped input-output (MMIO) instructions issued by a host processor – thus, there is a one-to-one mapping of these MMIO instructions and ILA instructions of the accelerator. As with the ISA, the ILA defines the architectural state of the accelerator as the state that is persistent across instructions. Again, as with the ISA, the ILA is a modular specification that defines how this architectural state is updated by each instruction. Further, the ILA-MCM model shows how the operational ILA model can be integrated with an axiomatic memory consistency model for a detailed functional specification that includes accelerator-processor interactions through shared memory.
Tentative Schedule
In this tutorial we will introduce the ILA model and its application to the different use cases for accelerator-rich platform highlighted above.
Resources
Organizers
Call for Participation: ISPASS 2022 Tutorials
https://ispass.org/ispass2022/
Submitted by Burin Amornpaisannon
The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) provides a forum for sharing advanced academic and industrial research focused on performance analysis in the design of computer systems and software. ISPASS 2022 will be held on May 22-24, 2022 as a Hybrid Event in Singapore.
ISPASS 2022 will be hosting tutorials at the conference venue on May 22, 2022. The purpose of these gatherings is to provide a forum for exchanging ideas and preliminary results of topics that are related to ISPASS in an interactive environment. The tutorials consist of two half-day sessions that introduce tools and techniques in computer architecture simulation and hardware security. The topics and abstracts of the tutorials are available in the computer architecture simulation tutorial website and hardware security tutorial website.
Important Dates
– Early registration deadline: May 6, 2022
– Tutorial date: May 22, 2022
Call for Participation: FCCM’22 Call for Participation (Early Registration by May 1)
https://www.fccm.org/
Submitted by Callie Hao
Call for Participation: The 30th IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM)
May 15–18, 2022 | New York City | Hybrid Event
The IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) is the original and premier forum for presenting and discussing new research related to computing that exploits the unique features and capabilities of FPGAs and other reconfigurable hardware.
Conference Information
Keynote, Program, and Workshop & Tutorials
— May 15 (Sunday) —
— May 16 (Monday) —
— May 17 (Tuesday) —
— May 18 (Wednesday) —
Demo Night: The Demo Night is an opportunity for people to show off their latest and greatest systems, tools, and technologies in a relaxed atmosphere. See the latest technology from industry, meet with the leading FCCM researchers, demonstrate your latest work, and receive early feedback on their work in progress.
Organization Committee
Call for Participation: ISCA 2022
https://iscaconf.org/isca2022
Submitted by Zehra Sura
The International Symposium on Computer Architecture (ISCA) is the premier forum for new ideas and research results in computer architecture.
The 49th edition of ISCA has been pushed back a week from its original dates, and will now be held June 18-22 in New York City. This year, the conference is being held in-person, with a provision for remote attendance for those who cannot make it in-person.
Registration for the conference is now open at:
https://www.iscaconf.org/isca2022/attend/register.php
Early registration deadline is May 20, 2022.
Workshop and tutorial details are available at:
https://www.iscaconf.org/isca2022/program/workshops.php
For more details, please visit the main conference website at:
https://iscaconf.org/isca2022
Call for Papers: ARITH 2022
https://arith2022.arithsymposium.org/
Submitted by Florent de Dinechin
29th IEEE International Symposium on Computer Arithmetic (ARITH 2022)
September 12-14, 2022 (virtual conference)
https://arith2022.arithsymposium.org/
Call for conference papers — Abstract deadline April 17, 2022
Computer arithmetic has always been at the core of the digital age, and is currently driving innovation in domains such as artificial intelligence, high-performance computing, signal processing, and security.
Since 1969, the ARITH symposia have served as the premier conference for presenting the latest research in computer arithmetic.
Due to the uncertainty of the world health situation and travel restrictions, the 29th edition of the symposium, ARITH 2022, will be a virtual conference with live presentation of research results, keynote talks, and panels.
ARITH 2022 welcomes submissions of conference papers (less than 8 pages in the IEEE CS Conference format) describing recent scientific advances related to computer arithmetic.
Accepted papers will be included in the conference proceedings and in the IEEE Xplore Digital Library.
Topics of interest include, but are not restricted to:
Important Dates
Abstract submission deadline: April 17, 2022
Paper submission deadline: April 24, 2022
Reviews sent to authors: June 20, 2022
Review rebuttal deadline: June 23, 2022
Authors notified: June 28, 2022
Camera ready and copyright due: July 17, 2022
Detailed submission procedure available at
https://arith2022.arithsymposium.org/call.html
General chair: Florent de Dinechin, INSA Lyon
Program co-chairs:
Stuart Oberman, Nvidia
Bogdan Pasca, Intel
Leonel Sousa, IST/U Lisbon
Call for Papers: PAW-ATM: Parallel Applications Workshop, Alternatives To MPI+X
http://sourceryinstitute.github.io/PAW/
Submitted by Karla Morris
Call for Papers: HotSpots Strike Back Workshop at ISCA
https://sites.tufts.edu/tcal/hssb-hotspots-strike-back/
Submitted by Mark Hempstead
HSSB: HotSpots Strike Back: Call For Papers
June 19th, 2022 New York City
At ISCA 2022: https://iscaconf.org/isca2022/
https://sites.tufts.edu/tcal/hssb-hotspots-strike-back/
On-chip thermal hotspots are becoming one of the primary design concerns for next-generation processors. Industry chip design trends coupled with post-Dennard power density have led to a stark increase in localized and application-dependent hotspots. These “advanced” hotspots cause a variety of adverse effects if untreated, ranging from dramatic performance loss, incorrect circuit operation, and reduced device lifespan. In the past, hotspots could be addressed with physical cooling systems and EDA tools; however, the severity of advanced hotspots is prohibitively high for conventional thermal regulation techniques alone. Cross stack approaches that incorporate device, circuit, packaging, cooling, architecture, and software are needed.
HSSB: HotSpots Strike Back: seeks papers that study next-generation advanced on-chip thermal hotspots. Position papers and work-in-progress papers are encouraged. The organizers are interested in presenting a diversity of fields and approaches to thermal on-chip hotspots.
List of Potential Topics
Submission and Presentation Format
An abstract of at most 2 pages should be submitted that describes the problem, the study or the design to be presented at the workshop. The presentation format will include a 15-30 minute presentation. In addition, all speakers will be invited to join a panel discussion at the end of their session where questions from the audience and debate among panelists will be encouraged.
Submit your abstract hereL https://sites.tufts.edu/tcal/hssb-hotspots-strike-back/
Important Dates
Submission Due Date: May 1, 2022
Author Notification: May 8, 2022
Final Abstract Due Date: May 29, 2022
Workshop: Sunday, June 19th (morning session)
Workshop Organizers
Call for Papers: Workshop on Accelerated Machine Learning (AccML) at HiPEAC 2022
https://accml.dcs.gla.ac.uk/
Submitted by José Cano
4th Workshop on Accelerated Machine Learning (AccML)
Co-located with the HiPEAC 2022 Conference
(https://www.hipeac.net/2022/budapest/)
June 22, 2022
Budapest, Hungary
The remarkable performance achieved in a variety of application areas (natural language processing, computer vision, games, etc.) has led to the emergence of heterogeneous architectures to accelerate machine learning workloads. In parallel, production deployment, model complexity and diversity pushed for higher productivity systems, more powerful programming abstractions, software and system architectures, dedicated runtime systems and numerical libraries, deployment and analysis tools. Deep learning models are generally memory and computationally intensive, for both training and inference. Accelerating these operations has obvious advantages, first by reducing the energy consumption (e.g. in data centers), and secondly, making these models usable on smaller devices at the edge of the Internet. In addition, while convolutional neural networks have motivated much of this effort, numerous applications and models involve a wider variety of operations, network architectures, and data processing. These applications and models permanently challenge computer architecture, the system stack, and programming abstractions. The high level of interest in these areas calls for a dedicated forum to discuss emerging acceleration techniques and computation paradigms for machine learning algorithms, as well as the applications of machine learning to the construction of such systems.
Organizers: https://accml.dcs.gla.ac.uk/
HiPEAC: https://www.hipeac.net/2022/budapest/#/program/sessions/7919/
Topics of interest include (but are not limited to):
Submissions
Papers will be reviewed by the workshop’s technical program committee according to criteria regarding the submission’s quality, relevance to the workshop’s topics, and, foremost, its potential to spark discussions about directions, insights, and solutions in the context of accelerating machine learning. Research papers, case studies, and position papers are all welcome.
In particular, we encourage authors to submit work-in-progress papers: To facilitate sharing of thought-provoking ideas and high-potential though preliminary research, authors are welcome to make submissions describing early-stage, in-progress, and/or exploratory work in order to elicit feedback, discover collaboration opportunities, and spark productive discussions.
Important Dates
Submission deadline: April 15, 2022
Notification of decision: April 30, 202
Organizers
José Cano (University of Glasgow)
Valentin Radu (University of Sheffield)
José L. Abellán (Catholic University of Murcia)
Marco Cornero (DeepMind)
Albert Cohen (Google)
Dominik Grewe (DeepMind)
Call for Papers: Accelerator Architecture in Computational Biology and Bioinformatics Workshop (AACBB-2022)
https://aacbb-workshop.github.io/
Submitted by Leonid Yavits
PLEASE NOTE THE NEW DATE, FOLLOWING THE DELAY OF ISCA-2022 BY A WEEK
4th Accelerator Architecture in Computational Biology and Bioinformatics workshop (AACBB-2022)
June 18th 2022
In conjunction with 49th IEEE International Symposium on Computer Architecture
New York City, New York, USA
Workshop website: https://aacbb-workshop.github.io/
Important dates
Submission link: https://easychair.org/conferences/?conf=aacbb2022
Submission deadline: April 20, 2022, EoD AoE
Notifications: May 5, 2022
Over the last decade, the advent of high-throughput sequencing techniques brought an exponential growth in sequenced data.At the same time, the single-thread performance continued to improve by only a few percent point annually. The growing gap between the performance demand to performance supply became a significant challenge in the path to scientific discovery. The computational bottleneck of genome analysis pipelines became even more apparent during the ongoing Covid-19 pandemic, where fast and reliable virus detection and classification tools have been critical for the worldwide genomic surveillance system.
The gap between the performance of a conventional computer architecture and the biological data processing requirements is growing. For example, assembling a human genome from 3rd generation sequenced data may require hundreds of CPU hours. Hence, computational biology and bioinformatics will have to rely on hardware accelerators to allow processing to keep up with the exploding amount of sequenced data.
In a typical application, the dominant portion of the runtime is spent in a small number of computational kernels, making it an excellent target for hardware acceleration. The combination of increasingly large datasets and high performance computing requirements make computational biology a prime candidate to benefit from accelerator architecture research. Potential directions include 3D integration, near-data processing, in-data processing and reconfigurable architectures.
This workshop will focus on architecture and design of hardware accelerators for computational biology and bioinformatics problems. We plan to present and discuss a variety of acceleration techniques, accelerator architectures and their implications on the development of computational biology. This year, we plan to extend the industry angle, by providing a keynote and invited talks from leading industry research specialists.
List of Topics
This workshop focuses on architecture and design of hardware and software accelerators for computational biology and bioinformatics problems. Topics of interest include, but are not limited to the following:
Hardware and software algorithms/applications in the fields of computational biology, such as (but not limited to):
Bioinformatics and computational biology accelerator architecture and design based on (but not limited to):
Keynote Speakers
Committees
Program Committee
Organizing committee
* Department of Engineering, Bar Ilan University
^ Department of Electrical and Computer Engineering, University of California, San Diego
Important Notes
Presenting a paper in the workshop does not preclude publication in other venues
Contact
All questions about submissions should be emailed to Leonid Yavits (leonid.yavits@gmail.com)
Call for Workshops/Tutorials: FPL 2022
http://fpl.org
Submitted by Zhenman Fang
FPL 2022 CALL FOR WOKRSHOPS / TUTORIALS
http://fpl.org
The 32nd International Conference on Field-Programmable Logic and Applications (FPL)
Aug 29 to Sep 2, 2022 @ Belfast, Northern Ireland, UK
Submissions due: 1st June 2022
The International Conference on Field-Programmable Logic and Applications (FPL) was the first and remains the largest covering the rapidly growing area of field-programmable logic and reconfigurable computing. Field-programmable devices promise the flexibility of software with the performance of hardware and have become an important area of research and development in high-performance computing systems, embedded and low-power control instruments, mobile communications, rapid prototyping and product emulation, among other areas. For the last 31 years, FPL has seen the first unveiling of the latest and most significant works in reconfigurable architectures, applications, embedded processors and design automation. FPL2022 will bring together academic and industrial researchers and practitioners from across the globe. It will offer a hybrid format, with the entire conference accessible both in-person and online.
FPL will be pleased to host in-person, hybrid or fully-virtual workshops and tutorials on Thursday, September 1 and Friday, September 2. We would be delighted to receive proposals for workshops, tutorials and special sessions to be held at FPL 2022.
These events provide excellent opportunities to bring together researchers and practitioners from different communities to share their experiences in an interactive atmosphere, and to foster collaboration for new and innovative projects. Proposals may be for successors of events that have been held in previous years, or for brand new events this year. Proposals should be submitted through the EasyChair submission system.
Suitable topics for event proposals include (but are not limited to):
For inspiration, you might like to consult the list of workshops and tutorials that were held at FPL last year:https://cfaed.tu-dresden.de/fpl2021/workshops-and-tutorials
If you would like to propose an event, please prepare a 2-page proposal that includes:
If you are proposing a hybrid event, please also briefly explain how you plan to ensure that virtual participants are involved. To help with this, workshop organisers will have access to the same web-based hybrid-conference platform as the main conference.
Submissions will be considered on first-come, first-serve basis. To allow sufficient time for organisation we request proposals by June 1st, as a single PDF file through the EasyChair submission system.
You are welcome to contact FPL 2022 Workshop chairs through the below email addresses for informal queries.
FPL Steering Committee
Patrick Lysaght (Xilinx), Chairman
Jürgen Becker (Karlsruhe Institute of Technology)
Koen Bertels (University of Porto)
Eduardo Boemo (Universidad Autónoma de Madrid)
João M. P. Cardoso (Universidade do Porto)
Peter Y. K. Cheung (Imperial College London)
Martin Danek (Daiteq)
Apostolos Dollas (Technical University of Crete)
Fabrizio Ferrandi (Politecnico di Milano)
Manfred Glesner (Technische Universität Darmstadt)
Diana Goehringer (Technische Universität Dresden)
Reiner Hartenstein (Technische Universität Kaiserslautern)
Andreas Herkersdorf (Technische Universität München)
Paolo Ienne (EPFL)
Udo Kebschull (Goethe Universität Frankfurt)
Wayne Luk (Imperial College London)
Xavier Martorell(Universitat Politècnica de Catalunya & Barcelona Supercomputing Center)
Jari Nurmi (Tampere University of Technology)
Ioannis Sourdis (Chalmers University of Technology)
Dirk Stroobandt (University of Ghent)
Lionel Torres (Université Montpellier 2)
Jim Tørresen (Universitetet i Oslo)
FPL’22 General Chairs
John McAllister, Queen’s University of Belfast, UK jp.mcallister@qub.ac.uk
Roger Woods, Queen’s University of Belfast, UK r.woods@qub.ac.uk
FPL’22 Workshops & Tutorials Chairs
Chongyan Gu, Queen’s University of Belfast, UK c.gu@qub.ac.uk
John Wickerson, Imperial College London, UK j.wickerson@imperial.ac.uk
Call for Posters: FPL 2022
http://fpl.org
Submitted by Zhenman Fang
FPL 2022 CALL FOR PhD Forum/Demo Night
http://fpl.org
The 32nd International Conference on Field-Programmable Logic and Applications (FPL)
Aug 29 to Sep 2, 2022 @ Belfast, Northern Ireland, UK
Submission deadline: June 01, 2022
Notification: June 15th 2022
Camera-Ready Deadline: June 27th 2022
The International Conference on Field-Programmable Logic and Applications (FPL) was the first and remains the largest covering the rapidly growing area of field-programmable logic and reconfigurable computing. Field-programmable devices promise the flexibility of software with the performance of hardware and have become an important area of research and development in high-performance computing systems, embedded and low-power control instruments, mobile communications, rapid prototyping and product emulation, among other areas. For the last 31 years, FPL has seen the first unveiling of the latest and most significant works in reconfigurable architectures, applications, embedded processors and design automation. FPL2022 will bring together academic and industrial researchers and practitioners from across the globe. It will offer a hybrid format, with the entire conference accessible both in-person and online.
The FPL 2022 PhD Forum is an excellent occasion for PhD students to present their work in progress or preliminary results, and receive early feedback from senior researchers and experts in the domain. Moreover, it is a unique opportunity for PhD students, whether fresh or close to completion, to give a broad overview of their work and draw attention to it from both the academic and industrial worlds.
PhD Forum authors are invited to submit 2-page papers using the same format as FPL 2022 regular papers before the deadline of June 1st, 2022 through the EasyChair submission system:
https://easychair.org/conferences/?conf=fpl2022.
PhD Forum papers should include clear descriptions of the project’s motivation, objectives, problem definition, addressed solutions, current status, and planned work if applicable. Contributions based on preliminary results or on work in progress are particularly encouraged. Accepted PhD Forum papers require a registration for being included in the conference proceedings and will be presented at a special poster session in conjunction with the FPL Demo Night. Therefore, PhD forum presenters can optionally provide a demo along with the poster presentation. Prior to the forum, presenters will endorse their posters through a short “elevator pitch” (2‐minute presentation).
The FPL 2022 Demo Night is an opportunity to demonstrate and disseminate exciting work at the biggest annual gathering of experts in the field. Bring your demo to FPL and increase your visibility, interact with attendees, impress the FPL community and make a real impact. Demonstrations may include, but are not limited to, academic or commercial experiments, prototypes, tools, platforms, systems, and applications. This year, we are particularly inviting open-source contributions. Academic presenters must register for the conference and presenters from industry, must sign up for one of the on-site sponsor packages. Demo Night presenters are invited to submit a demo description through the EasyChair submission system by June 1st, 2022 providing the following information:
Optionally, each submission may include a one-page abstract using the FPL 2022 regular papers format on a separate page. The abstract must state a technical contribution and will appear in the proceedings subject to passing a review process (pure marketing will be rejected). Abstract titles must start with “FPL Demo: …”
You are welcome to use those email addresses of the PhD Forum and Demo Night chairs for informal queries.
FPL Steering Committee
Patrick Lysaght (Xilinx), Chairman
Jürgen Becker (Karlsruhe Institute of Technology)
Koen Bertels (University of Porto)
Eduardo Boemo (Universidad Autónoma de Madrid)
João M. P. Cardoso (Universidade do Porto)
Peter Y. K. Cheung (Imperial College London)
Martin Danek (Daiteq)
Apostolos Dollas (Technical University of Crete)
Fabrizio Ferrandi (Politecnico di Milano)
Manfred Glesner (Technische Universität Darmstadt)
Diana Goehringer (Technische Universität Dresden)
Reiner Hartenstein (Technische Universität Kaiserslautern)
Andreas Herkersdorf (Technische Universität München)
Paolo Ienne (EPFL)
Udo Kebschull (Goethe Universität Frankfurt)
Wayne Luk (Imperial College London)
Xavier Martorell(Universitat Politècnica de Catalunya & Barcelona Supercomputing Center)
Jari Nurmi (Tampere University of Technology)
Ioannis Sourdis (Chalmers University of Technology)
Dirk Stroobandt (University of Ghent)
Lionel Torres (Université Montpellier 2)
Jim Tørresen (Universitetet i Oslo)
FPL’22 General Chairs
John McAllister, Queen’s University of Belfast, UK jp.mcallister@qub.ac.uk
Roger Woods, Queen’s University of Belfast, UK r.woods@qub.ac.uk
FPL’22 PhD Forum & Demo Chairs
Dirk Koch, University of Heidelberg, Germany dirk.koch@ziti.uni-heidelberg.de
Daniel Ziener, Technische Universität Ilmenau, Germany daniel.ziener@tu-ilmenau.de
Episode 8 of Computer Architecture Podcast Released! Featuring guest Prof. Todd Austin
https://comparchpodcast.podbean.com/
Submitted by Suvinay Subramanian
Computer Architecture Podcast: a series of conversations on cutting-edge work in computer architecture and the remarkable people behind it.
Announcing the release of Episode 8: Durable Security and Privacy-enhanced Computing with Dr. Todd Austin, University of Michigan, who is a Professor of Electrical Engineering and Computer Science at the University of Michigan in Ann Arbor. His research interests include robust and secure system design, hardware and software verification, and performance analysis tools and techniques. Todd has donned multiple hats, being a senior processor architect at Intel’s Microprocessor Research Labs, a professor at the University of Michigan, serving as the director of research centers like C-FAR, and more recently serving as the CEO and co-founder of the startup Agita Labs. He is also an IEEE Fellow and received the ACM Maurice Wilkes Award for his work on SimpleScalar, and the DIVA and Razor architectures.
Listen to the episode at https://comparchpodcast.podbean.com/. Also available on your favorite podcast player — iTunes, Spotify, Stitcher, etc.
Please view the SIGARCH website for the latest postings, to submit new posts, and for general SIGARCH information. We also encourage you to visit the Computer Architecture Today Blog.
- Akanksha Jain
SIGARCH Content Editor