This is the 1st March 2019 digest of SIGARCH Messages.

In This Issue

Call for Papers: Special Session on Edge Computing and Storage Systems at CPSCom - (Note: The Call for Paper type has not been set for this item!)


Call for Nominations: Call for Nominations: 2019 Alan D. Berenbaum Distinguished Service Award
https://www.sigarch.org/benefit/awards/acm-sigarch-distinguished-service-award
Submitted by Natalie Enright Jerger

ACM SIGARCH Alan D. Berenbaum Distinguished Service Award

This annual award is presented to an individual who has contributed important service to the computer architecture community.

The award is presented annually at the International Symposium on Computer Architecture Awards Banquet. This year’s recipient will be invited to accept the award at ISCA 2019. Recipients receive a memento engraved with their name along with a $1000 honorarium. The award recipient also receives up to $2000 towards support for travel costs, including airfare, hotel, and conference registration for ISCA. The recipient is listed with a citation for their award on the SIGARCH Alan D. Berenbaum Distinguished Service Award webpage.

Nominations should consist of:

1. Name, address, phone number and email of person making the nomination.
2. Name, affiliation, address, email, and telephone number of candidate for whom the award is recommended.
3. A statement (between 200 and 500 words long) explaining why the nominee deserves the award in question. Note that the award is given for service that goes above and beyond traditional service.
4. 4-7 letters of support. Include the name, affiliation, email address, and telephone number of the letter writer(s). Supporters of multiple candidates are strongly encouraged to compare the candidates in their letters.
5. State any conflicts of interest (COI) between the nominee and any committee members. Refer to the ACM COI guidelines (item 7) to determine what constitutes a COI. Please state explicitly if there are no conflicts.

Please send all your nomination materials as one pdf file no later than April 1, 2019 to the Chair of the Nominating Committee (Matthew Farrens farrens@cs.ucdavis.edu).


Call for Nominations: Call for Nominations: 2019 Maurice Wilkes Award
https://www.sigarch.org/benefit/awards/acm-sigarch-maurice-wilkes-award
Submitted by Sarita Adve

ACM SIGARCH Maurice Wilkes Award

The award of $2,500 is given annually for an outstanding contribution to computer architecture made by an individual whose computer-related professional career (graduate school or full-time employment, whichever began first) started no earlier than January 1st of the year that is 20 years prior to the year of the award.*

The award is presented annually at the International Symposium on Computer Architecture Awards Banquet. This year’s recipient will be invited to accept the award at ISCA 2019.

Nominations should consist of:

1. Name, address, and phone number of person making the nomination.
2. Name, affiliation, address, email, and telephone number of candidate for whom the award is recommended.
3. A statement (between 200 and 500 words long) as to why the candidate deserves the award. Note that since the award is for an outstanding contribution, the statement and supporting letters should address what the contribution is and why it is both outstanding and significant.
4. A maximum of five letters of support. Include the name, affiliation, email address, and telephone number of the letter writer(s). Supporters of multiple candidates are strongly encouraged to compare the candidates in their letters.
5. A statement regarding the nominee’s specific year of eligibility. That is, when did they begin their computer-related professional career, and are there any circumstances for which the 20 years of eligibility should be adjusted?
6. State any conflicts of interest (COI) between the nominee and any committee members. Refer to the ACM COI guidelines (item 7) to determine what constitutes a COI. Please state explicitly if there are no conflicts.

Please send all your nomination materials as one pdf file no later than April 1, 2019 to wilkes_sigarch@acm.org.

*At the discretion of the SIGARCH Executive Committee, eligibility may be adjusted for documented career interruptions (e.g., family-related or medical leaves, military service). Questions about eligibility should be directed to the SIGARCH Chair (chair_sigarch@acm.org).


Call for Participation: ISPASS 2019
https://www.ispass.org/ispass2019/
Submitted by Thomas Wenisch

IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
Madison, Wisconsin, USA
March 24-26, 2019

The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) provides a forum for sharing advanced academic and industrial research work focused on performance analysis in the design of computer systems and software. ISPASS 2019 will be held March 24 through 26, 2019 in Madison, WI.

The preliminary conference program has been posted, and registration and hotel reservations are now open. A detailed program is available on the conference website at https://www.ispass.org/ispass2019/

The early registration and discount hotel reservation deadlines are Feb. 15.
Registration: https://www.regonline.com/ispass-2019
Hotel: https://www.hilton.com/en/hi/groups/personalized/M/MSNMHHF-IEEE-20190324/index.jhtml?WT.mc_id=POG

Through the generous support of the sponsoring IEEE Technical Committees, the conference is pleased to offer travel grants to enable students to attend. Travel grant applications are due Feb. 11. See the conference website for details.

We invite all to attend the conference and hope to see you in Madison.

ORGANIZERS:
General Chair: Thomas F. Wenisch
Program Chair: Kelly Shaw


Call for Papers: Third Data Prefetching Championship
https://dpc3.compas.cs.stonybrook.edu/
Submitted by Alaa Alameldeen

Third Data Prefetching Championship
in conjunction with ISCA 2019
Phoenix, Arizona, USA
June 23, 2019

IMPORTANT DATES:
Submission Deadline (paper & code): May 3, 2019, 11:59:59PM EDT
Notification: May 17, 2019

The Third Data Prefetching Championship (DPC3) is a competition for data prefetching algorithms. Contestants will be given a fixed storage budget to implement their best prefetching algorithms on a common evaluation framework provided by the DPC3 organizing committee. The goal for this competition is to compare different data prefetching algorithms in a common framework. Prefetchers for L1, L2, and L3 data caches must be implemented within a fixed storage budget as specified in the competition rules. Submissions will be evaluated based on their performance on a set of benchmarks using the framework provided by the organizing committee. Each contestant is allowed a maximum of three submissions to the competition. Each submission should include the following an abstract, a paper and prefetcher code.

Further details are available at the workshop webpage.


Call for Papers: IEEE Micro Special Issue on Secure Architectures

Submitted by Lizy K John

Hardware is the bedrock on which all computing systems are built. Recently developed hardware ideas for enhancing software security from both academia and industry hold significant promise to improve software security. At the same time, recent hardware attacks on current commodity hardware has shown hardware to be a weak foundation for building secure systems. As we enter Post-Moore’s-Law era, there are significant questions surrounding what would make security techniques more practical.

IEEE Micro seeks articles on hardware enhanced security and privacy seeks papers on a range of topics, including but not limited to:
– Microarchitectural side-channel attacks and defenses; fault attacks and defenses
– Architectures for key management, attestation, patching and updating firmware and software
– Architectures for isolation and compartmentalization/tamper-proof execution
– Architectures for metadata based approaches to security and privacy
– Architectures for introspection, debugging, and root cause analysis
– Microarchitectural techniques for malware detection and adversarial resistance
– Secure storage, e.g. using emerging non-volatile memories
– Metrics and evaluation methodologies for secure architectures including languages/frameworks for early design stage security exploration
– Approaches to Post-Moore’s-Law security (secure-accelerator designs will ideally be in the context of an end-to-end application)
– Microarchitectural design patterns for security
– Social processes for creating security in large scale designs
– Secure architectures for domains such as voting machines, implantable medical devices, automotives, Internet-of-Things, and data centers.

IMPORTANT DATES:
Submissions due: March 4, 2019
Initial notifications: Apr 4, 2019
Revised papers due: May 4, 2019
Final notifications: May 10, 2019
Final versions due: May 24, 2019
Publication date: July/Aug 2019

SUBMISSION GUIDELINES:
Please see the Write for Us page and the general author guidelines for more information. Please submit electronically through ScholarOne Manuscripts, selecting this special-issue option.

Questions?
Contact the guest editors at Simha Sethumadhavan (simha@columbia.edu) and Mohit Tiwari (tiwari@austin.utexas.edu) or the editor-in-chief at Lizy John (ljohn@ece.utexas.edu).


Call for Papers: IEEE Micro Special Issue on Machine Learning Acceleration

Submitted by Lizy K John

In recent years, machine learning (ML) has become one of the most important pillars of computing industry, driven by the remarkable advances in the theory and their extensive use in real-world applications. To accomplish the phenomenal success, research and industry communities have exploited acceleration solutions, which deliver orders-of-magnitude greater performance and efficiency by specializing hardware and software for ML. As the importance of ML in the emerging applications increases, the ML accelerators have become the critical component of every modern computing system–from data centers to mobile/IoT devices. The community has not only extensively explored new architectures to improve the performance and efficiency of these accelerators, but also put significant effort on raising usability and programmability by offering programming models, high-level language, compiler, runtime software, and tools.

This special issue of IEEE Micro will explore academic and industrial research on all topics, which relate to hardware and software acceleration solutions, specialized for ML. Such topics include, but are not limited to:
– New design methodologies for ML-centric or ML-aware hardware accelerators
– New microarchitecture designs of hardware accelerators for ML
– ML workload acceleration on existing accelerators such as GPU, FPGA, CGRA, or ASIC
– New compiler and optimization techniques for ML acceleration
– New tools to design/build/optimize/debug the accelerated systems
– New ML modeling, optimization, quantization, and compression for acceleration
– Acceleration for new ML algorithms
– ML acceleration for edge computing and IoT
– ML acceleration for cloud computing
– Comparison studies of different acceleration techniques
– Survey and tutorial studies of ML acceleration

IMPORTANT DATES:
Submissions due: April 12, 2019
Initial notifications: May 22, 2019
Revised papers due: June 21, 2019
Final notifications: June 28, 2019
Final versions due: July 12, 2019
Publication date: Sept/Oct 2019

SUBMISSION GUIDELINES:
Please see the Write for Us page and the general author guidelines for more information. Please submit electronically through ScholarOne Manuscripts, selecting this special-issue option.

Questions?
Contact the guest editors at Hadi Esmaeilzadeh (hadi@eng.ucsd.edu) and Jongse Park (jspark@gatech.edu) or the editor-in-chief at Lizy John (ljohn@ece.utexas.edu).


Note: The Call for Paper type has not been set for this item!

Call for Papers: Special Session on Edge Computing and Storage Systems at CPSCom
http://cse.stfx.ca/~cybermatics/2019/cpscom/CPSComECSS.php
Submitted by Xianzhang Chen

Special session of Edge Computing and Storage Systems (ECSS)
at the 12nd IEEE International Conference on Cyber, Physical and Social Computing (CPSCom)
Atlanta, USA
July 14-17, 2019

IMPORTANT DATES:
Paper submission deadline (extended): March 1, 2019
Acceptance Notification: April 1, 2019
Camera-Ready Paper Due: June 1, 2019

The ECSS special session of the 12nd edition of CPSCom will be held in Atlanta. Original, unpublished papers describing research in the general areas of edge computing and storage systems are solicited.

The topics of interests for this special issue include, but are not limited to:
-Edge computing and edge storage architecture
-Real-time data processing and storage
-Fault models and fault tolerances in edge computing and storage system
-Energy efficiency issues in edge computing and storage
-Security and privacy issues in edge computing and storage
-Availability and reliability in edge computing and storage
-Intelligence in edge computing and storage
-Design methodologies, benchmarks, measurement, and tools for edge computing and storage
-Applications of edge computing and storage systems (including internet of vehicles, communication, manufacturing, smart civil infrastructures, and healthcare)
-Data profile of edge computing and storage systems

SUBMISSION GUIDELINES:
Papers are limited to 8 pages (regular paper), or 6 pages (short paper), and 2-4 pages for a poster paper following the IEEE proceedings format, and are to be submitted as PDF via the site: http://edas.info/N25496. Please select the CPSComECSS track in submission system.

Accepted conference papers will be published by IEEE (IEEE-DL and EI indexed). At least one author of each accepted paper is required to register and present their work at the conference; otherwise the paper will not be included in the proceedings. Selected papers, after further extensions and revisions, will be recommended to special issues. More details at the conference website: Accepted conference papers will be published by IEEE (IEEE-DL and EI indexed). At least one author of each accepted paper is required to register and present their work at the conference; otherwise the paper will not be included in the proceedings. Selected papers, after further extensions and revisions, will be recommended to special issues. More details at the conference website: http://cse.stfx.ca/~cybermatics/2019/cpscom/.

ORGANIZERS:
Xianzhang Chen, Chongqing University, xzchen@cqu.edu.cn
Chun Jason Xue, City University of Hong Kong, jasonxue@cityu.edu.hk


Announcement: ACM Digital Library usage
http://www.acm.org/publications/acm-author-izer-service
Submitted by Natalie Enright Jerger

The SIGARCH EC would like to encourage further use of the ACM Digital library (dl.acm.org) by our members. Downloading papers published in SIGARCH-sponsored conferences from the ACM DL provides a revenue stream back to SIGARCH. This revenue stream supports existing programs such as student travel grants and allows SIGARCH to develop new programs to further support its members. Please use the ACM DL in your research and use the ACM Authorizer to post ACM DL links to your own papers on your website (http://www.acm.org/publications/acm-author-izer-service). To encourage use of the ACM DL, we will be highlighting the top 10 papers from SIGARCH (co-)sponsored conferences downloaded over the last 6 weeks in each monthly SIGARCH newsletter. Happy reading!

Top 10 Downloaded papers in SIGARCH-sponsored publications (as of Jan 3, 2019):

1. In-Datacenter Performance Analysis of a Tensor Processing Unit – 2017, ISCA
Norman P. Jouppi, Cliff Young, Nishant Patil, David Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia,Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau,Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho,Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Daniel Killebrew, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary,Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan,Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Matt Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg,Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon
Downloaded 226 times

2. Secure remote sensing and communication using digital pufs – 2014, ANCS
Teng Xu, James Bradley Wendt, Miodrag Potkonjak
Downloaded 206 times

3. 3D Localization for Sub-Centimeter Sized Devices – 2018, SenSys
Rajalakshmi Nandakumar, Vikram Iyer, Shyamnath Gollakota
Downloaded 188 times

4. Minimal and maximal exposure path algorithms for wireless embedded sensor networks – 2003, SenSys
Giacomino Veltri, Qingfeng Huang, Gang Qu, Miodrag Potkonjak
Downloaded 152 times

5. PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory – 2016, ISCA
Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, Yuan Xie
Downloaded 137 times

6. TETRIS: Scalable and Efficient Neural Network Acceleration with 3D Memory – 2017, ASPLOS
Mingyu Gao, Jing Pu, Xuan Yang, Mark Horowitz, Christos Kozyrakis
Downloaded 135 times

7. ProvChain: A Blockchain-based Data Provenance Architecture in Cloud Environment with Enhanced Privacy and Availability – 2017, CCGrid
Xueping Liang, Sachin Shetty, Deepak Tosh, Charles Kamhoua, Kevin Kwiat, Laurent Njilla
Downloaded 120 times

8. The gem5 simulator – 2011, CAN
Nathan Binkert, Bradford Beckmann, Gabriel Black, Steven K. Reinhardt, Ali Saidi, Arkaprava Basu, Joel Hestness, Derek R. Hower, Tushar Krishna, Somayeh Sardashti, Rathijit Sen, Korey Sewell, Muhammad Shoaib, Nilay Vaish, Mark D. Hill, David A. Wood
Downloaded 119 times

9. Improving the future by examining the past: ACM Turing Award Lecture – 2010, ISCA
Charles P. Thacker
Downloaded 107 times

10. CapBand: Battery-free Successive Capacitance Sensing Wristband for Hand Gesture Recognition – 2018, SenSys
Hoang Truong, Shuo Zhang, Ufuk Muncuk, Phuc Nguyen, Nam Bui, Anh Nguyen, Qin Lv, Kaushik Chowdhury, Thang Dinh,Tam Vu
Downloaded 103 times


Please view the SIGARCH website for the latest postings, to submit new posts, and for general SIGARCH information. We also encourage you to visit the SIGARCH Blog.

- Boris Grot
SIGARCH Content Editor

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