WICArch Directory

We actively maintain a list of women working in the field of computing architecture. We welcome all students, post docs, researchers, faculty members, or hobbyists. If you would like your profile listed, please create an account here. If you need to modify your profile, please login and manage your profile.


 
Picture of Sally A McKee

Sally A McKee

Associate Professor
Clemson University
Personal URL

Research Statement

McKee received her bachelor’s degree in Computer Science from Yale University, master’s from Princeton University, and doctorate from the University of Virginia. Her dissertation advisor was Bill Wulf, with whom she worked on memory systems architecture. Together they coined the now-common term the “memory wall” to describe a situation in which processors are always waiting on memory, and CPU performance is therefore entirely limited by memory performance.

Before graduate school, McKee worked for Digital Equipment Corporation and Microsoft Corporation. She has also held internships at Digital Equipment Corporation’s Systems Research Center (now HP Labs) and the former AT&T Bell Labs. McKee worked as a Post-Doctoral Research Associate in the University of Virginia Computer Science Department for a year after graduating (waiting for the chip to come back from fab) and as a Computer Architect at Intel’s Microcomputer Research Lab in Oregon for the next two years. During her time at Intel, she also taught at the Oregon Graduate Institute and Reed College. McKee was a Research Assistant Professor at the University of Utah’s School of Computing from 1998 to 2002, where she worked on the Impulse Adaptable Memory Controller project. She joined Cornell University’s Computer Systems Lab within the School of Electrical and Computer Engineering in 2002. She moved to the Department of Computer Science and Engineering at Chalmers University of Technology in 2008, and she became the C. Tycho Howle endowed chair within the Holcombe Department of Electrical and Computer Engineering at Clemson University in 2018. She spent the 2017 calendar year on sabbatical at Rambus Labs in Sunnyvale, CA.

Her research has historically focused mainly on analyzing application memory behavior and designing more efficient memory systems together with the software to exploit them. Achieving this broad objective requires developing new underpinnings for system understanding, and thus she and her students and collaborators have developed new approaches to performance analysis; built scalable tools for application analysis and system modeling; designed architectures to enable more comprehensive system introspection and analyses; designed efficient memory systems for HPC and embedded platforms; and automated memory optimizations for HPC applications.

 

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architectural Support For Programming Languages Or Software Development, Architectural Support For Security Or Virtualization, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems, Processor, Memory, and Storage Systems Architecture
Picture of Natalie Enright Jerger

Natalie Enright Jerger

Professor
University of Toronto
Personal URL

Research Statement

Natalie Enright Jerger is the Percy Edward Hart Professor of Electrical and Computer Engineering at the University of Toronto. Prior to joining the University of Toronto, she received her MSEE and PhD from the University of Wisconsin-Madison in 2004 and 2008, respectively. She received her Bachelor's degree from Purdue University in 2002. She is a recipient of the Ontario Ministry of Research and Innovation Early Researcher Award in 2012, the 2014 Ontario Professional Engineers Young Engineer Medal recipient and the 2015 Borg Early Career Award winner. She served as the program co-chair of the 7th Network-on-Chip Symposium and as the program chair of the 20th International Symposium on High Performance Computer Architecture. She is currently serving as the ACM SIGMICRO Vice Chair and an ACM SIGARCH Executive Committee member. Her current research explores on-chip networks, approximate computing, IoT architectures and machine learning acceleration. She is also passionate about increasing the representation of women in computing, particular in computer architecture. She currently chairs the organizing committee for the Women in Computer Architecture group (WICARCH). In 2017, she co-authored the second edition of the Computer Architecture Synthesis Lecture on On-Chip Networks with Li-Shiuan Peh and Tushar Krishna. Her research has been supported by NSERC, Intel, CFI, AMD and Qualcomm.

Interests

Architecture Modeling and Simulation Methodologies, Interconnection Network, Router and Network Interface Architecture, Iot, Mobile and Embedded Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Antara

Antara

PhD Scholar
Indian Institute of Technology Bombay
(No URL)

Research Statement

Antara is doing a PhD at Computer Architecture and Dependable Systems Lab (CADSL), IIT Bombay in collaboration with the University of Tokyo. She is an Intel India PhD fellow and Google WomenTechmaker Asia-Pacific scholar. She is currently interning at Microarchitecture Research Labs (MRL), Intel India. Her areas of interest include near-data processing, 3D DRAMs, convolutional neural network, non-von Neumann architecture and related topics. She has worked on multicore cache coherence protocols during her masters at IIIT Delhi. Her work on dual-port SRAMs with ST Microelectronics was published in VDAT’16. She interned at SanDisk where she designed a digital duty cycle corrector for NAND flash high-speed interface. She has also worked in automotive electronics at TATA Motors Sanand plant.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Effects Of Circuits Or Technology On Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Masoomeh Jasemi

Masoomeh Jasemi

Phd Candidate
University of California Irvine
Personal URL

Research Statement

I am a research scholar in the Electrical Engineering and Computer Science department at University of California, Irvine advised by Prof. Nader Bagherzadeh. I am interested lie in Accelerator based architecture, memory systems, multicore and parallel computing, and heterogeneous architectures. Currently, I am working on mitigating memory bottleneck in deep neural networks (DNN) accelerator based architectures.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Dependable Architecture, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Shuwen Deng

Shuwen Deng

PhD student
Yale University
(No URL)

Research Statement

Dear Committee,

I am Shuwen Deng, a second-year Ph.D. student at Yale University, under the supervision of Professor Jakub Szefer. My current research focuses on computer architecture and security. One of my main research topics now is security hardware verification. We implemented a design-time security verification framework for secure processor architectures which uses information flow analysis to verify the security properties of an
architecture. I am also pretty interested in using model checking way to verify secure architectures.

Thanks so much for considering me to be a member of WICARCH!

Best Regards,

Shuwen Deng

Yale University

Interests

Architectural Support For Security Or Virtualization
Picture of Vivienne Sze

Vivienne Sze

Associate Professor
Massachusetts Institute of Technology
Personal URL

Research Statement

Vivienne Sze is an Associate Professor at MIT in the Electrical Engineering and Computer Science Department. Her research interests include energy-aware signal processing algorithms, and low-power circuit and system design for portable multimedia applications, including computer vision, deep learning, autonomous navigation, and video coding. Prior to joining MIT, she was a Member of Technical Staff in the R&D Center at TI, where she designed low-power algorithms and architectures for video coding. She also represented TI in the JCT-VC committee during the development of High Efficiency Video Coding (HEVC), which received a Primetime Emmy Engineering Award. She is a co-editor of the book entitled “High Efficiency Video Coding (HEVC): Algorithms and Architectures” (Springer, 2014).

Prof. Sze is a recipient or co-recipient of the 2011 Jin-Au Kong Outstanding Doctoral Thesis Prize in Electrical Engineering at MIT, the 2017 CICC Outstanding Invited Paper Award, the 2017 Qualcomm Faculty Award, the 2016 IEEE Micro Top Picks Award, the 2016 Google Faculty Research Award, the 2016 AFOSR Young Investigator Award, the 2016 3M Non-Tenured Faculty Award, the 2014 DARPA Young Faculty Award, the 2008 A-SSCC Outstanding Design Award and the 2007 DAC/ISSCC Student Design Contest Award.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Iot, Mobile and Embedded Architecture
Picture of Sayeh Sharify

Sayeh Sharify

PhD student
University of Toronto
Personal URL

Research Statement

Sayeh Sharify received her B.Sc. degree in Computer Engineering from Sharif University of Technology in 2013, and her M.A.Sc. degree in Electrical Engineering from University of Toronto in 2015, where she is currently a third year Ph.D. student. Her research interests include computer architecture, machine learning, embedded systems, and reconfigurable computing. She is currently working on designing hardware accelerators for machine learning algorithms.

Interests

Iot, Mobile and Embedded Architecture
Picture of Kelly Shaw

Kelly Shaw

Associate Professor
University of Richmond / Reed College
Personal URL

Research Statement

Broadly speaking, I'm interested in computer architecture, particularly parallel systems. Prior work has included workload characterization of parallel applications and memory systems in traditional multiprocessor systems and GPUs. Recent work explores correctness in IoT systems.

 

Interests

Iot, Mobile and Embedded Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Carole-Jean Wu

Carole-Jean Wu

Assistant Professor
Arizona State University
Personal URL

Research Statement

I am an Assistant Professor in Computer Science and Engineering at Arizona State University (ASU). I am also the Associate Director of the NSF I/UCRC Center for Embedded Systems (CES). Before joining ASU, I held a number of industrial internship positions with Intel, IBM, and Google. I am a senior member of both ACM and IEEE.

My research area lies in Computer and System Architectures. In particular, my research interests include high-performance and energy-efficient computer architectures through

  • hardware heterogeneity,
  • energy harvesting techniques for emerging computing devices,
  • temperature and energy management for portable electronics,
  • performance characterization, analysis and prediction, and
  • memory subsystem designs.

I am the recipient of the 2017 NSF CAREER Award, the 2017 IEEE Young Engineer of the Year Award, the 2014 IEEEE Best of Computer Architecture Letter Award, the 2013 Science Foundation of Arizona Bisgrove Early Career Award, and the 2011-12 Intel Ph.D. Fellowship Award. My research has been supported by both industry sources and the National Science Foundation to a level over $1.8 million.

I serve on the Executive Committee of the IEEE Technical Committee on Computer Architecture from 2017-19 and am the Program Chair for the IEEE International Symposium on Workload Characterization, 2018. I completed my M.A. and Ph.D. degrees in Electrical Engineering from Princeton University in 2008 and 2012, respectively, and received a B.Sc. degree in Electrical and Computer Engineering from Cornell University.

Interests

Evaluation and Measurement Of Real Systems, Instruction, Thread and Data-Level Parallelism, Iot, Mobile and Embedded Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Ruppel

Ruppel

PhD Candidate
Carnegie Mellon University
Personal URL

Research Statement

I am a PhD candidate in the Electrical and Computer Engineering department at Carnegie Mellon and a member of the ABSTRACT research group led by Professor Brandon Lucia. My research interests include computer architecture and hardware/software codesign for resource constrained, embedded devices. My current research focuses on programming and execution models for intermittently powered, energy harvesting devices.

Interests

Architectural Support For Programming Languages Or Software Development, Evaluation and Measurement Of Real Systems, Iot, Mobile and Embedded Architecture
Placeholder. No Picture provided by Hai “Helen” Li

Hai “Helen” Li

Associate Professor
Duke University
Personal URL

Research Statement

Hai “Helen” Li is currently Clare Boothe Luce Associate Professor of Electrical and Computer Engineering Department at Duke University, USA. She received the B.S. and M.S. degrees from Tsinghua University, China, and the Ph.D. degree from the Department of Electrical and Computer Engineering, Purdue University, USA. Her current research interests include memory design and architecture, neuromorphic architecture for brain-inspired computing systems, and architecture/circuit/device cross-layer optimization for low power and high performance. Dr. Li is a distinguished member of ACM, a distinguished speaker of ACM (2017-2020), and a distinguished lecture of IEEE CAS society (2018-2019).

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Effects Of Circuits Or Technology On Architecture, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Atefeh Mehrabi

Atefeh Mehrabi

PhD Student
Duke University
(No URL)

Research Statement

Atefeh Mehrabi is a PhD student at ECE department of Duke University. She is co-advised by Prof. Sorin and Prof. Lee. Her research focuses in the area of computer architecture. More specifically, she is exploring and trying to tackle challenges of emerging reconfigurable accelerators. She got her B.Sc degree from University of Tehran in 2016 in Electrical Engineering and her M.Sc degree in Computer Engineering from Duke in 2018.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Datacenter-Scale Computing
Picture of Sanaz

Sanaz

Lecturer
Penn State Behrend
Personal URL

Research Statement

I am a faculty at Penn State Behrend where I teach Computer Architecture and Programming with C++/MATLAB. I am interested in optimizing current architecture for emerging technologies such as artificial intelligence and deep learning.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Radha Venkatagiri

Radha Venkatagiri

PhD Candidate
University of Illinois at Urbana Champaign
Personal URL

Research Statement

I am a PhD candidate at the University of Illinois at Urbana-Champaign. My advisor is Prof Sarita Adve. My research interests include Error-Efficient Computing, Approximate Computing, Hardware Resiliency and Software Testing. The overarching theme of my dissertation work is enabling reliable, low-cost and efficient computing by allowing controlled errors in the system. My work aims to explore such opportunities in emerging workloads and build an ecosystem to formalize and automate the application of error-efficient computing techniques. I am among the young researchers selected to participate in the 2018 Heidelberg Laureate Forum.

Before joining UIUC, I was a CPU/Silicon validation engineer at Intel for five years, where I won a divisional award for key contributions in validating new industry standard CPU features. Prior to that I worked for 1.5 years at Qualcomm on the architectural verification of the Snapdragon processor. I completed my MS in ECE from North Carolina State University. My undergraduate degree, in Electrical Engineering, is from the University of Madras in India.

Interests

Architecture For Emerging Technologies and Applications, Dependable Architecture
Picture of Megan Wachs

Megan Wachs

Lead Platform Engineer
SiFive, Inc
Personal URL

Research Statement

Leveraging the power of open source software to democratize access to custom silicon. Heavily involved in the RISC-V revolution, Chisel HDL design, Free Chips Project, and friends. I'm interested in building Chip Generators (instead of Chips), Secure Hardware, and custom ASICs.

Interests

Architectural Support For Security Or Virtualization, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Janie Irwin

Janie Irwin

Emerita Evan Pugh University Professor
Penn State University
Personal URL

Research Statement

Mary Jane (Janie) Irwin is an Emerita Evan Pugh University Professor in the Department of Computer Science and Engineering at The Pennsylvania State University. She retired in July 2017. Her research and teaching interests include computer architecture, energy-aware and reliability-aware design, emerging technologies, and VLSI systems design and design automation. She is a Fellow of IEEE and ACM and a member of NAE and AAAS. Awards she has received include the 2003 IEEE/CAS VLSI Transactions Best Paper of the Year Award, the 2010 ACM Athena Lecturer Award, the 2012 Ten-Year Retrospective Most Influential ASP-DAC Paper Award, the 2015 FLP Conference 25 Year Paper Recognition, the 2017 ACM/SIGDA Pioneering Achievement Award, and the 2018 EDAA Lifetime Achievement Award. Irwin received her M.S. and Ph.D. degrees from the University of Illinois, Urbana-Champaign and an Honorary Doctorate from Chalmers University, Sweden.htt

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Effects Of Circuits Or Technology On Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Yasuko Eckert

Yasuko Eckert

Sr. Member of Technical Staff
AMD Research
Personal URL

Research Statement

Yasuko Eckert is a Sr. Member of Technical Staff at AMD Research and an IEEE Senior Member. She received her M.S. and Ph.D. from the University of Wisconsin-Madison in 2007 and 2011, respectively. She received her B.S. from the University of Texas at Austin in 2004. Her research interests include SoC- and package-level architectural optimizations, 3D integration, energy-efficient computing, and microarchitecture designs. She is currently serving as the Tutorial/Workshop Co-chair of the 51st International Symposium on Microarchitecture, as well as an Associate Editor of IEEE Transactions on Multi-Scale Computing Systems (TMSCS). She has served on the Technical Program Committees of MICRO, HPCA, PACT, ISLPED, and ICCD. She holds more than 25 U.S. patents.

Interests

Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Effects Of Circuits Or Technology On Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Tali Moreshet

Tali Moreshet

Senior Lecturer
Boston University
Personal URL

Research Statement

Research interests include energy-aware multiprocessor design, embedded systems, hardware- software co-design, memory synchronization, transactional memory, error tolerance, Processing- in-Memory.

Interests

Iot, Mobile and Embedded Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Peiqi

Peiqi

Ph.D. Candidate
Tsinghua University
(No URL)

Research Statement

Hi, my name is Peiqi Wang, a fourth-year Ph.D. candidate in computer science and technology from Tsinghua University, Beijing. I also have a one-year visiting experience in UCSB. My current research interests include accelerator architecture, computing with emerging devices, and deep learning optimization.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications
Placeholder. No Picture provided by Yaqi

Yaqi

PhD Student
Stanford University
(No URL)

Research Statement

Yaqi Zhang is a PhD candidate in the Electrical Engineering Department at Stanford University. Her research interest is in hardware accelerator design and compiler optimizations for spatial and parallel architectures. She received a BS in Electrical Engineering from Duke University. She is a student member of IEEE. Contact her at yaqiz@stanford.edu.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture
Picture of NEHA AGARWAL

NEHA AGARWAL

Software Engineer
Google LLC
Personal URL

Research Statement

Server memory management is an evolving and challenging area. With growing memory capacity installed per machine and increasing memory DIMM costs, data center planners are facing with huge increase in memory TCO. A plausible direction is to categorize memory accesses by required service level objective (SLO) with the end goal to map lower SLO request to cheaper but low quality memory resource, while using expensive, highest quality memory resource for most critical application request. I work in Linux server memory management to categorize memory access transparent to the user space.

Interests

Architectural Support For Programming Languages Or Software Development, Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems, Processor, Memory, and Storage Systems Architecture
Picture of Divya Mahajan

Divya Mahajan

PhD Candidate
Georgia Institute of Technology
Personal URL

Research Statement

I am a PhD candidate in the Computer Science Department at Georgia Institute of Technology advised by Professor Hadi Esmaeilzadeh. I received my Bachelors (2012) in Electrical Engineering from Indian Institute of Technology Ropar, India where I was honored with the President of India Gold medal for my outstanding academic performance. Subsequently, I completed my Masters (2014) from the University of Texas, at Austin in Electrical and Computer Engineering. I joined my PhD studies in Fall 2014 and since have been a part of Alternate Computing Technologies lab. My research interests include computer architecture, microarchitecture design, and developing alternative technologies for efficient computing. I am continuously working towards designing full stack solutions and template-based architectures for accelerating Machine Learning and Deep Learning algorithms on an FPGA. Besides my primary research-area of computer architecture, I have also worked at the intersection of machine learning, hardware design, programming languages and databases. In my free time, I like to spend time oil painting, cooking, and reading novels.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Iot, Mobile and Embedded Architecture
Picture of Diman

Diman

Postdoc Researcher
Hewlett Packard Enterprise Labs
Personal URL

Research Statement

I'm Diman Zad-Tootaghaj, I am a postdoc/researcher at Hewlett Packard Labs in Palo Alto, California. I work on Software-Defined Network solutions in Wide Area Networks (SD-WAN).

I earned my PhD in Computer Science and Engineering at Pennsylvania State University. Prior to Penn State, I got my B.Sc degree in Electrical Engineering at Sharif University of Technology, Iran. During my PhD, I was working in the Institute for Networking and Security Research (INSR) and Network Sciences Research Group (NSRG) under supervision of Prof. Thomas La Porta (advisor), Dr. Ting He (co-advisor), and Dr. Novella Bartolini.

My research area is computer networks, stochastic analysis, operating system, and parallel computing. I graduated from Sharif University of technology, with MSc. in Electrical Engineering.

I'm on the N2Women board as a Website Co-chair.

Interests

Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Dependable Architecture, Interconnection Network, Router and Network Interface Architecture
Picture of Caroline Trippel

Caroline Trippel

Ph.D. Candidate
Princeton University
Personal URL

Research Statement

Caroline Trippel is a fifth year Ph.D candidate in the Computer Science department at Princeton University. She is advised by Professor Margaret Martonosi on her dissertation research in the area of Computer Architecture, and more specifically, on the topic of concurrency and security verification in heterogeneously parallel systems. Caroline is a 2017-2018 NVIDIA Graduate Fellowship Recipient. She has influenced the design of the RISC-V ISA memory consistency model both via full-stack memory consistency model analysis of its draft specification and her subsequent participation in the RISC-V Memory Model Task Group. Additionally, she has developed tools and techniques that synthesized two new variants of the recently publicized Meltdown and Spectre attacks. She received her B.S. in Computer Engineering from Purdue University in 2013, and her M.A in Computer Science from Princeton University in 2015.

Interests

Architectural Support For Programming Languages Or Software Development, Architectural Support For Security Or Virtualization, Architecture Modeling and Simulation Methodologies, Multiprocessor Systems
Picture of Hyeran Jeon

Hyeran Jeon

Assistant Professor
San Jose State University
Personal URL

Research Statement

Hyeran Jeon joined San Jose State University in August 2015. Her research interests lie in energy-efficient high-throughput processor and systems design. She earned her Ph.D. at the University of Southern California in 2015. She spent her summer at IBM T.J. Watson Research Center and the fall at AMD Research as a research intern in 2012. Before pursuing her Ph.D., she worked as a systems software engineer at Samsung Electronics, Korea from 2002 to 2009. Hyeran obtained her M.S. from Georgia Institute of Technology and Korea University in 2008, and B.S. from Pusan National University, Korea in 2002.

Interests

Architecture For Emerging Technologies and Applications, Instruction, Thread and Data-Level Parallelism, Processor, Memory, and Storage Systems Architecture
Picture of Lauren

Lauren

Database Architect
Carestream Dental/Georgia Tech
Personal URL

“]

Research Statement

Database

Interests

Architectural Support For Programming Languages Or Software Development, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Iot, Mobile and Embedded Architecture
Picture of Amrita Mazumdar

Amrita Mazumdar

PhD Student
University of Washington
Personal URL

Research Statement

Amrita Mazumdar is a PhD student at the University of Washington, advised by Luis Ceze and Mark Oskin. Her research interests are in computer architecture support for virtual reality and other emerging graphics workloads. Her past work has focused on designing hardware accelerators for applications such as VR video processing, near-data similarity search, and low-power computer vision. She received her MS (2017) from the University of Washington, and her BS (2014) from Columbia University.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Maria Angélica

Maria Angélica

PhD student
Universidad de Zaragoza
(No URL)

Research Statement

I am working with heterogeneous systems, specifically with CPU, GPU and FPGA. I am investigating the behavior of a heterogeneous node, evaluating the interaction and how it can improve the execution time and energy consumption.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architectural Support For Programming Languages Or Software Development
Picture of Shaizeen Aga

Shaizeen Aga

Researcher
AMD Research
Personal URL

Research Statement

Shaizeen is a Researcher at AMD Research. She received her M.S. and Ph.D. from the University of Michigan, Ann Arbor in 2013 and 2017, respectively. Her research interests include design of novel near-data computing solutions and techniques to reduce data movement in heterogeneous systems. She has received several awards and honors for her research including winning the best demo award at the 2016 Center for Future Architectures Research (CFAR) Annual Research Review which showcased nearly 50 projects in computer architecture related topics from several leading institutions. Her work during her undergraduate days won 1st place in Parallel Computing at Imagine Cup 2009, a worldwide student technical competition organized by Microsoft.

Interests

Architecture For Emerging Technologies and Applications, Processor, Memory, and Storage Systems Architecture
Picture of Sneha D. Goenka

Sneha D. Goenka

Graduate Student
Stanford University
Personal URL

Research Statement

I am a Ph.D. student in the Electrical Engineering department at Stanford University, advised by Prof. Bill Dally. I am interested in developing co-processors to accelerate genomic applications. (Contact: gsneha@stanford.edu)

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications
Picture of Lisa Hsu

Lisa Hsu

Principal Architect
Microsoft
(No URL)

Research Statement

I'm broadly interested in computer architecture, particularly memory systems and the management and synchronization of data. I like building whole, balanced systems and understanding how all the pieces are connected, related, and affect each other.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture Modeling and Simulation Methodologies, Instruction, Thread and Data-Level Parallelism, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Lizy Kurian John

Lizy Kurian John

Professor
UT Austin
Personal URL

Research Statement

Lizy Kurian John is B. N. Gafford Professor in the Electrical and Computer Engineering at UT Austin. She received her Ph. D in Computer Engineering from the Pennsylvania State University. Her research interests include workload characterization, performance evaluation, architectures with emerging memory technologies such as die-stacked DRAM, and high performance processor architectures for emerging workloads. She is recipient of NSF CAREER award, UT Austin Engineering Foundation Faculty Award, Halliburton, Brown and Root Engineering Foundation Young Faculty Award 2001, University of Texas Alumni Association (Texas Exes) Teaching Award 2004, The Pennsylvania State University Outstanding Engineering Alumnus 2011, etc. She has coauthored a book on Digital Systems Design using VHDL (Cengage Publishers, 2007, 2017), a book on Digital Systems Design using Verilog (Cengage Publishers, 2014) and has edited 4 books including a book on Computer Performance Evaluation and Benchmarking. She is in ISCA and HPCA Hall of Fame, holds 10 US patents and is a Fellow of IEEE.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Effects Of Circuits Or Technology On Architecture, Evaluation and Measurement Of Real Systems, Instruction, Thread and Data-Level Parallelism, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Karin

Karin

Senior Researcher
Microsoft
Personal URL

Research Statement

Add a Tooltip Text

Interests

Architectural Support For Programming Languages Or Software Development, Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Effects Of Circuits Or Technology On Architecture, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Rose Li

Rose Li

Graduate student
University of Toronto
(No URL)

Research Statement

I am a Masters student under the supervision of Prof. Natalie Enright Jerger at the University of Toronto. My research interests include intermittent computing, on-chip power management, and ISAs. I have had previous industry experience at AMD, Intel PSG, and Nvidia.

Interests

Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Suchita Pati

Suchita Pati

Graduate Student
University of Wisconsin - Madison
Personal URL

Research Statement

My research interests are in Computer Architecture and Systems and my current research focuses on optimizing GPU architectures for Deep Learning applications, specifically Recurrent Neural Networks. I have been a part of the effort to augment GPGPU-Sim, a widely used GPU simulator, to execute Deep Learning kernels written using NVIDIA's cuDNN and cuBLAS libraries. My research advisor is Prof. Matthew D. Sinclair.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture Modeling and Simulation Methodologies
Placeholder. No Picture provided by Geeta Patil

Geeta Patil

Faculty
BITS Pilani
(No URL)

Research Statement

I recently finished my Ph.D.

My research interest is in computer architecture.

 

Interests

Evaluation and Measurement Of Real Systems, Instruction, Thread and Data-Level Parallelism
Picture of Evey Liu

Evey Liu

Junior Graduate Student
University of Toronto
(No URL)

Research Statement

Evey Liu recently finished her undergraduate study at the University of Waterloo for Computer Engineering. She will begin graduate school at the University of Toronto with supervisor Natalie Enright Jerger in January 2019. She is passionate about generic computer architecture and is open to explore different specializations within the field.

Interests

Datacenter-Scale Computing, Interconnection Network, Router and Network Interface Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Cristina Silvano

Cristina Silvano

Professor
Politecnico di Milano
Personal URL

Research Statement

Add a Tooltip Text

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Multiprocessor Systems
Picture of Dana Vantrease

Dana Vantrease

Hardware Engineer
Amazon Web Services
Personal URL

Research Statement

Dana Vantrease works on custom silicon solutions for Amazon Web Services. She is a Qualcomm Innovation Finalist, NSF Graduate Research Fellow, MICRO-49 best presentation award recipient, and holds patents in Silicon Photonics and Computer Architecture. She received her PhD from the University of Wisconsin-Madison and BS from The Ohio State University. She enjoys wild ideas, gauging technological vs business trade-offs, and designing holistic sw/hw systems.

Interests

Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Processor, Memory, and Storage Systems Architecture
Picture of Lisa Wu

Lisa Wu

Postdoctoral Researcher
University of California Berkeley
Personal URL

Research Statement

Lisa Wu is a postdoctoral research fellow at University of California, Berkeley. Prior to joining UC Berkeley, she was a research scientist at Intel Labs. Her research interests include computer architecture and microarchitecture, accelerators, energy-efficient computing, and emerging applications related to big data such as database and graph analytics, and healthcare such as genomics analytics for precision medicine. Wu has a PhD in computer science from Columbia University, a MS in computer science and engineering from University of Michigan Ann Arbor, and a BS in electrical and computer engineering from University of Illinois Urbana-Champaign. Prior to pursuing her doctorate, she was a computer and performance architect at Intel for many years, architecting various Xeon and IPF server processors including leading the Xeon Phi Vector Processing Unit architecture.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Evaluation and Measurement Of Real Systems, Instruction, Thread and Data-Level Parallelism, Processor, Memory, and Storage Systems Architecture
Picture of Mahita

Mahita

PhD student
NCSU
Personal URL

Research Statement

I am passionate about research and teaching. I want to gain expertise in the field of multi-core architecture and improve coherency and synchronization methods which are crucial for performance in the cutting edge computing applications. I aspire to teach knowledge with a sense of purpose and inspire scientific temperament as a way of life. Additionally, I strongly believe that diversity is instrumental in finding innovative solutions and am committed to making computing a more inclusive world.

Interests

Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing
Picture of Anne Bracy

Anne Bracy

Senior Lecturer
Cornell University
Personal URL

Research Statement

Anne Bracy is a Senior Lecturer in Computer Science at Cornell University. Prior to teaching at Cornell, Dr. Bracy was a Principal Lecturer and Coordinator of Undergraduate Research in Computer Science at Washington University in St Louis. She was also a Research Scientist at the Microarchitecture Research Lab at Intel in Santa Clara, California.

Dr Bracy received her PhD from University of Pennsylvania for her work on instruction fusion under the supervision of Amir Roth. Prior to her doctoral studies she was a student at Stanford University, where she was inducted into the Phi Beta Kappa honor society.

Interests

Architecture Modeling and Simulation Methodologies, Instruction, Thread and Data-Level Parallelism
Picture of Poona Bahrebar

Poona Bahrebar

Postdoctoral Researcher
Ghent University, Belgium
Personal URL

Research Statement

Poona Bahrebar received the B.Eng. degree in Software Engineering, and M.Eng. degree in Hardware Engineering with the highest GPA (summa cum laude) from the National University of Iran in 2005 and 2007, respectively. She received the Ph.D. degree in Computer Science Engineering from Ghent University, Belgium, in 2017 where she is currently a Post-Doctoral Researcher at the Department of Electronics and Information Systems. Her research interests include on-chip interconnection networks, run-time reconfiguration, fault tolerance, and computer architecture.

Interests

Interconnection Network, Router and Network Interface Architecture
Picture of Gnanambikai Krishnakumar

Gnanambikai Krishnakumar

Ph.D. candidate
Indian Institute of Technology, Madras
(No URL)

Research Statement

I'm a Ph.D. candidate at Department of Computer Science and Engineering, Indian Institute of Technology, Madras, advised by Prof. Chester Rebeiro. My research interests are broadly in the area of secure systems design, with a specific focus on micro-architecture level solutions against various attacks against cryptographic implementations, such as cache side-channel attacks. I'm also interested in exploring the applications of AI to help in building a more secure framework. I was one among the 12 candidates across the world to present my research at Lenovo AI Innovation Challenge Event at SuperComputing Conference 2017, Denver, Colorado. I was also one of the three-member team from IIT Madras that won the First Place in the CSAW Embedded Security Challenge 2016. We designed a secure implementation of an OpenRISC processor to detect and prevent buffer overflow attacks.

Interests

Architectural Support For Security Or Virtualization, Processor, Memory, and Storage Systems Architecture
Picture of Iyswarya Narayanan

Iyswarya Narayanan

PhD candidate
The Pennsylvania State University
Personal URL

Research Statement

I am a final year PhD candidate at Penn State, advised by Dr. Anand Sivasubramaniam. I am interested in optimizing the physical infrastructure of a datacenter viz., power, compute, memory and storage. In my recent works I applied data analytics, system-level profiling and optimizations for efficient datacenter operations.

I have spent three summers as an intern at Microsoft Research - Redmond which greatly shaped my research directions. My work on flash reliability titled, SSD failures in datacenters: What? When? Why? was awarded Best Student Paper at SYSTOR-2016. I have also received outstanding graduate research assistant award at Penn State in 2018.

Interests

Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems, Processor, Memory, and Storage Systems Architecture
Picture of Hoda Naghibijouybari

Hoda Naghibijouybari

PhD Student
UC Riverside
Personal URL

Research Statement

I am a PhD student at the Department of Computer Science and Engineering at University of California, Riverside. I am advised by Professor Nael Abu-Ghazaleh.

My research focuses on Architectural Support for Security, GPU Security, Side Channels and Covert Channels. I am also interested in Computer Architecture.

Interests

Architectural Support For Security Or Virtualization
Placeholder. No Picture provided by Alexandra Jimborean

Alexandra Jimborean

Assistant Professor
Uppsala University
Personal URL

Research Statement

Alexandra Jimborean received the PhD degree from the University of Strasbourg, France in 2012. She is assistant professor with Uppsala University since 2015. She was awarded the Anita Borg Memorial Scholarship offered by Google in recognition of excellent research, along with other 25 distinctions, awards and grants. Her research focuses on compile-time and run-time code analysis and optimization for performance and energy efficiency and on software-hardware co-designs.

Interests

Architectural Support For Programming Languages Or Software Development, Instruction, Thread and Data-Level Parallelism
Placeholder. No Picture provided by Nicole Rodia

Nicole Rodia

Hardware Development Engineer
Apple
(No URL)

Research Statement

I am interested in parallel and heterogeneous architectures and application-specific accelerators, and how we can design and program them to continue improving application performance and efficiency in the face of limits to frequency and power scaling.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Evaluation and Measurement Of Real Systems, Instruction, Thread and Data-Level Parallelism, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Mitali

Mitali

PhD Student
IIIT Delhi
(No URL)

Research Statement

Mitali is a PhD student at Advanced Multicore Systems (AMS) lab, IIIT Delhi. Her research interests lie in the area of designing efficient many-accelerator systems and developing energy-efficient hardware accelerators for deep neural networks. Her recent work on CNN hardware accelerators was published in ASAP'18. She has also contributed to research work published in conferences including ISCAS'18, ISVLSI'18, IGSC'18.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Interconnection Network, Router and Network Interface Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Pantea

Pantea

PhD student
LEHIGH UNIVERSITY
Personal URL

Research Statement

I am a PhD student at Lehigh University, advised by Professor Michael Spear. I am interested in distributed and concurrent systems, parallel computing, and compilers. My research focuses on extending programming languages to allow programmers to exploit hardware and software memory features like persistence, transactions, and encryption. My previous work focused on adaptive sparse matrix representations for efficient matrix-vector multiplication on GPUs.

Interests

Architectural Support For Programming Languages Or Software Development, Processor, Memory, and Storage Systems Architecture
Picture of Lana Josipovic

Lana Josipovic

PhD student
EPFL
Personal URL

Research Statement

Hi! I am Lana, a doctoral student in the Processor Architecture Laboratory led by Professor Paolo Ienne.

My research focuses on bridging the gap between software and hardware with the purpose of building efficient circuits for Field Programmable Gate Arrays (FPGAs). I develop new high-level synthesis (HLS) techniques: the purpose is to generate hardware designs from high-level programming languages and to enable software developers to build efficient accelerators. I aim to change the HLS paradigm so that the produced circuits share key features with modern superscalar processors and are able to handle important classes of irregular and control-dominated applications.

I am grateful to have received the Google PhD Fellowship, the EPFL EDIC Fellowship, and the Google Anita Borg (Women Techmakers) Scholarship.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture
Placeholder. No Picture provided by Tripti Warrier

Tripti Warrier

Assistant Professor
Cochin University of Science and Technology (CUSAT)
Personal URL

Research Statement

My PhD work at Indian Institute of Technology Madras, was on Shared Cache Management. I am interested in architectures for emerging technologies, heterogeneous architectures and application specific accelerators.

Interests

Architecture For Emerging Technologies and Applications, Instruction, Thread and Data-Level Parallelism, Processor, Memory, and Storage Systems Architecture
Picture of Jun Yang

Jun Yang

Professor
University of Pittsburgh
(No URL)

Research Statement

Jun Yang is a William Kepler Whiteford Professor of Electrical and Computer Engineering Department at the University of Pittsburgh. Prior to joining the University of Pittsburgh, she was an assistant professor of the Computer Science and Engineering Department at University of California, Riverside. Jun received her bachelor from Nanjing University, China, and her PhD from the University of Arizona in 1995 and 2002 respectively. Jun’s research is in the broad area of computer architecture and her recent focuses include GPU designs, architecture level security, emerging memory technologies, 3D integration, and power and thermal management techniques. Jun is a recipient of NSF CAREER award in 2008, IEEE MICRO Top Picks award in 2010, and best paper awards of ISLPED 2013 and ICCD 2007. She was on the editorial board of IEEE Computer Architecture Letters, and she has served in the Organizing and Technical Program Committee in ISCA, MICRO, and HPCA, for many years. She has been included in the HPCA hall of fame since 2017.

Interests

Architectural Support For Programming Languages Or Software Development, Architectural Support For Security Or Virtualization, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Dependable Architecture, Effects Of Circuits Or Technology On Architecture, Instruction, Thread and Data-Level Parallelism, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Helena Caminal

Helena Caminal

Ph.D. student
Cornell University
Personal URL

Research Statement

Helena Caminal is a first-year Ph.D. student in the Computer Systems Lab at Cornell University, advised by Prof. José F. Martínez. She is generally interested in computer architecture and systems, with a focus on processing-in-memory.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Processor, Memory, and Storage Systems Architecture
Picture of Diana Marculescu

Diana Marculescu

David Edward Schramm Professor of Electrical and Computer Engineering
Carnegie Mellon University
Personal URL

Research Statement

I am a Professor of Electrical and Computer Engineering at Carnegie Mellon University. Together with my research group (ENergY Aware Computing, EnyAC) I do work on sustainable computing and computing for sustainability or life science applications. I am regularly teaching courses on energy aware computing, computer architecture, and CAD for VLSI and have advised more than a dozen doctoral students, 35+ master students, and more than two dozen undergrads.

Since 2015, I have also been the Founding Director of the College of Engineering Center for Faculty Success, an on-campus umbrella center that offers engineering faculty access to resources on mentoring, professional development, and leadership training.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture Modeling and Simulation Methodologies, Effects Of Circuits Or Technology On Architecture, Iot, Mobile and Embedded Architecture
Placeholder. No Picture provided by Meenatchi Jagasivamani

Meenatchi Jagasivamani

PhD Student
University of Maryland
Personal URL

Research Statement

PhD Student at University of Maryland, College Park, working on Emerging Technologies on Computer Architecture

Interests

Effects Of Circuits Or Technology On Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Margaret Martonosi

Margaret Martonosi

Professor
Princeton University
Personal URL

Research Statement

For decades, Moore’s Law and its partner Dennard Scaling have driven technology trends that have enabled exponential performance improvements in computer systems at manageable power dissipation. With the slowing of Moore/Dennard improvements, designers have turned to a range of approaches for extending scaling of computer systems performance and power efficiency. Unfortunately, these scaling gains come at the expense of degraded hardware-software abstraction layers, increased complexity at the hardware-software interface, and increased challenges for software reliability, interoperability, and performance portability. My work explores the way forward for computer systems designers in this “Post-ISA” era of shifting abstractions. My group looks hardware and software design issues for specialization/heterogeneity and methods for formal verification. We are also increasingly focused on the hardware/software systems issues of Quantum Computing.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Effects Of Circuits Or Technology On Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Devashree Tripathy

Devashree Tripathy

Graduate Student Researcher
University Of California, Riverside
Personal URL

Research Statement

I am a PhD candidate in the Department of Computer Science & Engineering at the University of California, Riverside. I work with Distinguished Prof. Laxmi Narayan Bhuyan and Prof.Daniel Wong and am a member of SoCal Lab at UCR. My interest lies in Computer Architecture , GPGPU Architecture design, High Performance Computing, Fault-Tolerance systems. I have worked on multiple projects on Data- Dependent Applications on GPGPU, Low power Design of GPGPU Execution units and have achieved notable improvements in terms of Performance gain and Power and Area saving.

Interests

Instruction, Thread and Data-Level Parallelism, Iot, Mobile and Embedded Architecture, Multiprocessor Systems
Picture of Ulya Karpuzcu

Ulya Karpuzcu

Assistant Professor
University of Minnesota
Personal URL

Research Statement

Modern computing platforms are fundamentally energy-limited. My research focuses on how to improve the energy efficiency of computing and spans two major themes: (1) Pushing Traditional (CMOS-based) Computing to Its Limits; (2) Computing with post-CMOS Devices/Paradigms.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Dependable Architecture, Effects Of Circuits Or Technology On Architecture
Picture of Akanksha Jain

Akanksha Jain

Research Associate
The University of Texas at Austin
Personal URL

Research Statement

Akanksha Jain received her PhD in Computer Science from The University of Texas at Austin in December 2016 and is currently a Research Associate at UT. Her research interests are in computer architecture, with a particular focus on the memory system and on using machine learning techniques to improve the design of memory system optimizations. Her work has been recognized with a Best Paper Nomination at MICRO 2013, a Top Picks Honorable Mention at ISCA 2016, and the first place award at the Cache Replacement Championship in 2017.

Interests

Processor, Memory, and Storage Systems Architecture
Picture of Qiuyun Llull

Qiuyun Llull

Member of Technical Staff
VMware
Personal URL

Research Statement

Qiuyun Llull joined VMware in 2017, working on the performance of next-generation Software-defined Data Center. She is broadly interested in system and architecture for emerging applications, such as data analytics, machine learning, IoT, and autonomous driving. She received her Ph.D. in Computer Engineering from Duke University in 2017, working with Prof. Benjamin Lee. Her doctoral research applies microeconomic models to manage resources in large-scale data centers; her dissertation received Outstanding Dissertation Award from the Duke ECE department. Her recent publication (Amdahl's law in the Datacenter Era: A Market for Fair Processor Allocation) won the Best Paper Award at HPCA 2018. Before coming to the United States, she obtained her M.S. degree from University Paris Sud, France and B.Eng. degree from Huazhong University of Science and Technology, China

Interests

Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Processor, Memory, and Storage Systems Architecture
Picture of Li-Shiuan Peh

Li-Shiuan Peh

Professor
National University of Singapore
Personal URL

Research Statement

Peh Li Shiuan joins NUS as Provost’s Chair Professor in the Department of Computer Science, with a courtesy appointment in the Department of Electrical and Computer Engineering in September 2016. Previously, she was Professor of Electrical Engineering and Computer Science at MIT and was on the faculty of MIT since 2009. She was also the Associate Director for Outreach of the Singapore-MIT Alliance of Research & Technology (SMART). Prior to MIT, she was on the faculty of Princeton University from 2002. She graduated with a Ph.D. in Computer Science from Stanford University in 2001, and a B.S. in Computer Science from the National University of Singapore in 1995. Her research focuses on networked computing, in many-core chips as well as mobile wireless systems. She was awarded the IEEE Fellow in 2017, NRF Returning Singaporean Scientist Award in 2016, ACM Distinguished Scientist Award in 2011, MICRO Hall of Fame in 2011, CRA Anita Borg Early Career Award in 2007, Sloan Research Fellowship in 2006, and the NSF CAREER award in 2003.

Interests

Architecture For Emerging Technologies and Applications, Effects Of Circuits Or Technology On Architecture, Interconnection Network, Router and Network Interface Architecture, Iot, Mobile and Embedded Architecture, Multiprocessor Systems
Picture of Eun Jung (EJ)

Eun Jung (EJ)

Associate Professor
Texas A&M University
Personal URL

Research Statement

EJ Kim is an Associate Professor in the Department of
Computer Science & Engineering, Texas A&M University, where she has been since 2003. She received the BS degree in computer science from the Korea
AdvancedInstitute of Science and Technology, Korea, in 1989, the MS degree in computer science from the Pohang University of Science and Technology, Korea, in
1994, and the PhD degree in computer science and engineering from the Pennsylvania
State University in 2003. Her research interests
include computer architecture, approximation computing, parallel/distributed systems, low-power design, secure computing, and performance evaluation.

Interests

Interconnection Network, Router and Network Interface Architecture
Placeholder. No Picture provided by Rui Zhang

Rui Zhang

Graduate Student
University of North Carolina at Chapel Hill
(No URL)

Research Statement

I am a 4th year PhD student at UNC Chapel Hill, dabbling in hardware security research. I am fortunate to be advised by Prof. Cynthia Sturton.

I am broadly interested in all aspects of hardware security. The goals of my research are to help hardware designers efficiently build more secure processors that can withstand a wide range of attack programs in the field, as well as to provide interesting insights about hardware vulnerabilities to the community.

I completed my BS in Microelectronics from Peking University, and my MS in Electrical Engineering from Columbia University.

Interests

Architectural Support For Security Or Virtualization
Picture of Tamara Lehman

Tamara Lehman

PhD student
Duke University
Personal URL

Research Statement

Tamara Silbergleit Lehman is a 5th year PhD candidate at Duke university. Her thesis work focuses on reducing overheads of secure memory. More broadly, her research interests lie on the intersection of computer architecture and security. She is also interested in memory systems, simulation methodologies and emerging technologies. Tamara has a Bachelor's degree from University of Florida in Industrial Engineering and a Masters degree in Computer Engineering from Duke University. Her latest publication on understanding metadata access patterns in secure memory at ISPASS 2018 won the best paper award. Her earlier work on developing a safe speculation mechanism for secure memory published in MICRO 2016 got an honorable mention in Micro Top Picks.

Interests

Architectural Support For Security Or Virtualization, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Ana Klimovic

Ana Klimovic

Graduate Student
Stanford University
Personal URL

Research Statement

I am a PhD student at Stanford University, advised by Professor Christos Kozyrakis. I am interested in computer systems and architecture, particularly in the context of large-scale datacenters. My research focuses on improving resource utilization in distributed computer and storage systems while providing high, predictable performance. My internships at Facebook and Microsoft Research have greatly inspired my research directions. Before coming to Stanford, I graduated from the Engineering Science undergraduate program at the University of Toronto.

Interests

Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Amna Shahab

Amna Shahab

PhD Student
The University of Edinburgh
Personal URL

Research Statement

Amna Shahab is a 2nd-year PhD student at The University of Edinburgh, advised by Boris Grot. Her research interests broadly lie in computer architecture and more specifically on memory system design for emerging datacenter workloads. She also has a passion for teaching and hopes to learn how to effectively translate it into a passion for learning from students.

Interests

Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Effects Of Circuits Or Technology On Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Samira Khan

Samira Khan

Assistent Professor
University of Virginia
Personal URL

Research Statement

Add a Tooltip Text

Interests

Architecture For Emerging Technologies and Applications, Processor, Memory, and Storage Systems Architecture
Picture of Christina Delimitrou

Christina Delimitrou

Assistant Professor
Cornell University
Personal URL

Research Statement

Christina is an assistant professor in the Electrical and Computer Engineering Department at Cornell and the John and Norma Balen Sesquicentennial Faculty Fellow. At Cornell she leads the SAIL group, and is also a member of the Computer Systems Laboratory (CSL). Christina works in computer architecture and computer systems, and more specifically on improving the predictability, resource efficiency, and security of large-scale datacenters.

She is the recipient of a Facebook Faculty Research Award (2017), a VMWare Research Award (2018), 3 IEEE Micro Top Picks awards (2014, 2017, 2018), a Facebook Graduate Fellowship (2014), and a Stanford Graduate Fellowship (2010-2013). Before joining Cornell, Christina received her PhD from Stanford University. She had previously received an MS also from Stanford, and a diploma in Electrical and Computer Engineering from the National Technical University of Athens.

 

Interests

Datacenter-Scale Computing
Placeholder. No Picture provided by Newsha Ardalani

Newsha Ardalani

Research Scientist
Baidu SVAIL
(No URL)

Research Statement

My research interest is at the intersection of machine learning and system/architecture: Applying ML to solve system/architecture problems and also exploring system/architecture innovations to scale ML problems to orders of magnitude.
During my phD, I studied how to use ML to perform cross-architecture performance prediction. In Baidu Research, I am working on both system and ML problems. On the system side, I am studying the system/architecture design for future ML problems, given the model, data and technology scaling trend, and predicting the performance/energy trade-offs of future ML problems on future hardware designs. On ML side, I am studying the error surface characteristics of overparametrized models.

Interests

Architecture For Emerging Technologies and Applications
Picture of Rujia Wang

Rujia Wang

Assistant Professor
Illinois Institute of Technology
Personal URL

Research Statement

Rujia Wang joined Illinois Institute of Technology in Fall 2018. She earned her Ph.D. and M.S degree from Electrical and Computer Engineering Department at the University of Pittsburgh and her B.E. from Zhejiang University. Her research experience spans across multiple areas in computer engineering, including novel memory architecture, secure computing architecture, system reliability, and high-performance computing, and her work has been published in top conferences in computer architecture area.

Interests

Architectural Support For Security Or Virtualization, Dependable Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Esha Choukse

Esha Choukse

PhD Candidate
University of Texas at Austin
Personal URL

Research Statement

Esha Choukse is a 5th year PhD Candidate in Computer Architecture at UT Austin, advised by Dr. Mattan Erez. Her research interests lie in memory and interconnect architecture in general. More specifically, her thesis deals with memory capacity challenges across processor and accelerators, using main memory compression. She focuses on OS-unaware compression, to help use fewer data center nodes for large working set problems, to run more applications concurrently on PCs, and to help run larger applications on GPUs.

Esha is graduating in Spring 2019 and looking for full-time research positions in the industry.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Evaluation and Measurement Of Real Systems, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Alexandra Angerd

Alexandra Angerd

PhD Student
Chalmers University of Technology
(No URL)

Research Statement

I am a PhD Student at Chalmers University of Technology in Gothenburg, Sweden under the guidance of Professor Per Stenström. My research focuses on GPU architectures for approximate computing systems.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Instruction, Thread and Data-Level Parallelism, Processor, Memory, and Storage Systems Architecture
Picture of Angeliki

Angeliki

Associate Professor
University of Rennes
Personal URL

Research Statement

Since 2014, I am an Associate Professor at the Education and Research Department of Computer Science and Electrical Engineering in University of Rennes 1, whereas my research activities are taking place at the IRISA/INRIA Rennes Bretagne Atlantique research center. My research interests include Embedded Systems, Real-time Systems, Mixed-Critical Systems, Hardware/Software Co-design, Mapping Methodologies, Design Space Exploration Methodologies, Memory Management Methodologies, Low Power Design, Fault Tolerance.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Dependable Architecture, Iot, Mobile and Embedded Architecture, Multiprocessor Systems
Placeholder. No Picture provided by Noa Zilberman

Noa Zilberman

Fellow
University of Cambridge
Personal URL

Research Statement

Noa Zilberman is a Research Fellow at the University of Cambridge Computer Science and Technology Department. Her research focuses on high performance systems, combining aspects of computer networks, computer architecture, reconfigurable hardware and systems. She has over 15 years of industrial experience, in design, management and architecture roles. In her last role before joining Cambridge, she was a Senior Principal Chip Architect at Broadcom's Network Switching group. In Cambridge she is a PI on multiple projects studying high performance networked-systems and the Chief Architect of the NetFPGA-SUME platform, an open source platform for networking research.
Noa is a Leverhulme Trust Early Career Fellow, a Newton Trust Research Fellow, a Wolfson College Research Fellow (Title BI) and a Senior Member of IEEE. She received her PhD in Electrical Engineering from Tel-Aviv University.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems, Interconnection Network, Router and Network Interface Architecture
Picture of Darya

Darya

Graduate Student
Univeristy of Rochester
(No URL)

Research Statement

Darya Mikhailenko is pursuing a PhD in Electrical and Computer Engineering at the University of Rochester under the supervision of Prof. Engin Ipek. Her interests cover areas of energy-efficient computer architectures, machine learning for computer vision applications, memory management, accelerators, and architecture modeling for emerging technologies. Darya worked as a research assistant at Nanoelectronics Research Laboratory (Purdue University, U.S.A.) and Bioinspired Microelectronics Systems Laboratory (Nazarbayev University, Kazakhstan) on the implementation of brain-computer architecture to actualize deep neural networks. Her recent work was dedicated to techniques to minimize data movement energy by exploiting asymmetric on- and off-chip interconnects. Currently, she researches microarchitecture level optimizations for AR/VR applications.

Darya is looking for internships in the field of AR/VR related but not limited to computer architecture and machine learning algorithms.

Interests

Architecture For Emerging Technologies and Applications, Effects Of Circuits Or Technology On Architecture, Instruction, Thread and Data-Level Parallelism, Interconnection Network, Router and Network Interface Architecture, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Angeles G. Navarro

Angeles G. Navarro

Associate Professor
University of Malaga
(No URL)

Research Statement

Angeles G. Navarro received her PhD in Computer Science from the University of Malaga (Spain) in 2000. She is an Associate Professor in the Department of Computer Architecture at the University of Malaga. She has been a Research Visiting Scholar in the University of Illinois at Urbana-Champaign, the Technical University of Munich, the EPCC at the University of Edinburgh, the University of Bristol, and a Research Visitor in IBM T.J. Watson Research Center at New York and in Cray Inc at Seattle. She is the author or co-author of more than 70 papers and has served as a program committee member for several High Performance Computing related conferences. Her research interests are in parallel programming models and compilation techniques for heterogeneous and reconfigurable architectures.

Dr. Navarro has been involved in many initiatives to promote women in Computer Science. She is the co-founder of WSARTECO (Women in SARTECO), a community that is part of the Spanish Computer Architecture Scientific Society, which encourages junior and senior women working in the area to increase visibility and to develop a supporting network.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architectural Support For Programming Languages Or Software Development
Picture of Megan

Megan

VP of Engineering
SiFive
Personal URL

Research Statement

Currently serving as SiFive's VP of Hardware Engineering. Passionate about getting more women into the open source community. R & D interests include Chip Generators, Cryptographic Hardware, shared memory protocols, accelerating custom ASIC Design. Earned her Ph.D. in Electrical Engineering from Stanford University (w/ Prof. Mark Horowitz) and her undergraduate degree in Engineering from Brown University.

Interests

Architectural Support For Programming Languages Or Software Development, Architectural Support For Security Or Virtualization
Picture of Sophia Shao

Sophia Shao

Research Scientist
NVIDIA
Personal URL

Research Statement

Sophia Shao joined NVIDIA Research in July 2016. Her research interests include specialized architectures, machine learning hardware, architectural modeling, and VLSI design methodology. She received her B.S. in Electrical Engineering from Zhejiang University, China and her S.M. and Ph.D. in Computer Science from Harvard University, working with Professors David Brooks and Gu-Yeon Wei. Her work was selected as one of the TopPicks in Computer Architecture in 2015. She is a Siebel Scholar and a recipient of the IBM Ph.D. Fellowship.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Evaluation and Measurement Of Real Systems
Picture of Shuang Chen

Shuang Chen

PhD Student
Cornell University
Personal URL

Research Statement

Shuang Chen is a third-year Ph.D. student in the Computer Systems Lab at Cornell University, advised by Prof. José F. Martínez and Prof. Christina Delimitrou. She is generally interested in computer architecture and systems, with a focus on datacenters and architectural support for emerging memory technologies.

Interests

Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Processor, Memory, and Storage Systems Architecture
Picture of Xiaochen Guo

Xiaochen Guo

Assistant Professor
Lehigh University
Personal URL

Research Statement

Dr. Guo is an assistant professor in the Department of Electrical and Computer Engineering at Lehigh University. Dr. Guo received her Ph.D. degree in Electrical and Computer Engineering from the University of Rochester in 2015, and B.S. degree from Beihang University in 2009. Dr. Guo's research interests are in the broad area of computer architecture, with an emphasis on leveraging emerging technologies to build energy-efficient architectures. She received the IBM Ph.D. Fellowship twice. Dr. Guo is a recipient of the National Science Foundation CAREER Award and the Lawrence Berkeley National Laboratory Computing Sciences Research Pathways Fellowship.

Interests

Architectural Support For Programming Languages Or Software Development, Architecture For Emerging Technologies and Applications, Processor, Memory, and Storage Systems Architecture
Picture of Lillie Pentecost

Lillie Pentecost

PhD Student
Harvard University
Personal URL

Research Statement

Lillie's general research interests are in specialized hardware and software-hardware co-design, and her current work focuses on enabling efficient deep learning. She received her B.A. in Physics and Computer Science from Colgate University in 2016, and she is currently pursuing her PhD in Computer Science at Harvard University, where she works with David Brooks and Gu-Yeon Wei.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Iot, Mobile and Embedded Architecture
Picture of Reetuparna Das

Reetuparna Das

Assistant Professor
University of Michigan
(No URL)

Research Statement

Reetu Das is an Assistant Professor at University of Michigan. Prior to this, she was a research scientist at Intel Labs, and the researcher-in-residence for the Center for Future Architectures Research. She received her PhD in Computer Science and Engineering from Pennsylvania State University, University Park. Some of her recent projects include in-memory architectures, fine-grain heterogeneous core architectures for mobile systems, and low-power scalable interconnects for kilo-core processors. Her research program has been funded by National Science Foundation, the Center for Future Architectures Research (C-FAR), Semiconductor Research Corporation and Intel Corporation. Reetu is an expert in computer architecture. She has authored over 45 papers, filed 7 patents and served on over 20 technical program committees. She has served as a track chair for Design Automation Conference for two consecutive years. Her research has been recognized by several awards. She has received outstanding research and teaching assistantship awards at Pennsylvania State University, an IEEE Top Picks award, an NSF CAREER award, CRA-W Borg Early Career Award, IEEE/ACM MICRO Hall of Fame award and was recently inducted to ISCA Hall of Fame. Her recent work on in-memory design named Compute Caches received the best Demo award in C-FAR and was selected from 50 projects from leading University research groups. She also serves as the CEO of a precision medicine start-up, Sequal Inc.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architectural Support For Security Or Virtualization, Architecture For Emerging Technologies and Applications, Effects Of Circuits Or Technology On Architecture, Interconnection Network, Router and Network Interface Architecture, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Iris Bahar

Iris Bahar

Professor
Brown University
Personal URL

Research Statement

I am currently a Professor of Engineering at Brown University. I have been on Brown’s faculty since 1996, in the School of Engineering, following completion of my PhD from University of Colorado, Boulder. My research interests include energy-efficient computer architectures; computer-aided design for logic synthesis, verification, and low-power applications; and design, test, and reliability analysis for nanoscale systems.

Interests

Iot, Mobile and Embedded Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Diman

Diman

Research Postdoc
Hewlett Packard Enterprise
Personal URL

Research Statement

I'm Diman Zad-Tootaghaj, I am a postdoc/researcher at Hewlett Packard Labs in Palo Alto, California. I work on Software-Defined Network solutions in Wide Area Networks (SD-WAN).

I earned my PhD in Computer Science and Engineering at Pennsylvania State University. Prior to Penn State, I got my B.Sc degree in Electrical Engineering at Sharif University of Technology, Iran. During my PhD, I was working in the Institute for Networking and Security Research (INSR) and Network Sciences Research Group (NSRG) under supervision of Prof. Thomas La Porta (advisor), Dr. Ting He (co-advisor), and Dr. Novella Bartolini.

My research area is computer networks, stochastic analysis, operating system, and parallel computing. I graduated from Sharif University of technology, with MSc. in Electrical Engineering.

I'm on the N2Women board as a Website Co-chair.

Interests

Datacenter-Scale Computing
Picture of Narges Shahidi

Narges Shahidi

Software Engineer
Google
Personal URL

Research Statement

I recently graduated from Penn State University. My research at Penn State was focused on memory and storage architecture. I worked on NAND flash solid state drives on cloud and enterprise environments. I also did an internship at Memory Solution Lab in Samsung Semiconductor where I worked on open channel solutions for SSD storage architectures. I am now a Software Engineer at Google platform team working on system drivers for cloud storages.

Interests

Processor, Memory, and Storage Systems Architecture
Picture of Akshitha Sriraman

Akshitha Sriraman

Graduate Student
University of Michigan
Personal URL

Research Statement

Computer architecture and software systems with special emphasis on multiprocessor and multicore systems, data center architectures, and large-scale distributed systems.

Interests

Datacenter-Scale Computing
Placeholder. No Picture provided by Haiyu Mao

Haiyu Mao

Ph.D. candidate
Tsinghua University
(No URL)

Research Statement

I am a fourth-year Ph.D. student at Tsinghua University. My research interests include non-volatile memory, processing in memory and machine learning.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Suzanne Rivoire

Suzanne Rivoire

Associate Professor & Chair of Computer Science
Sonoma State University
Personal URL

Research Statement

My research has focused on power and energy in large-scale computing: modeling, measurement, management, and design at the system level. I'm currently Chair of CS at Sonoma State University, a campus of the California State University system. Ph.D. students who are interested in teaching at undergraduate institutions are welcome to contact me!

Interests

Datacenter-Scale Computing, Evaluation and Measurement Of Real Systems
Picture of Itir Akgun

Itir Akgun

PhD Candidate
UC Santa Barbara
Personal URL

Research Statement

I am a PhD candidate in the ECE department of University of California, Santa Barbara under the guidance of Prof. Yuan Xie. I got my Master's degree also from UC Santa Barbara in 2015. I completed my undergraduate studies in the ECE department of University of Illinois at Urbana-Champaign in 2014.

My current research explores the design space of the memory fabric in memory-centric system architectures, given the emerging memory technologies and integration trends, to identify bottlenecks and trade-offs and proposes scalable solutions.

Interests

Architecture For Emerging Technologies and Applications, Datacenter-Scale Computing, Effects Of Circuits Or Technology On Architecture, Interconnection Network, Router and Network Interface Architecture, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Wenjie Xiong

Wenjie Xiong

PhD Candidate
Yale University
Personal URL

Research Statement

I am broadly interested in hardware security. I am working on designs of new Physically Unclonable Functions (PUFs), leveraging physical properties of hardware for new cryptographic and security applications, and security verification of processor architectures.

Interests

Architectural Support For Security Or Virtualization
Picture of Ghazal Tashakor

Ghazal Tashakor

Research Fellow - PhD Student
Universitat Autònoma de Barcelona
Personal URL

Research Statement

Ghazal Tashakor is Research Fellow and PhD Candidate for trainee research staff position (PIF) at the Computer Architecture & Operating Systems Department (CAOS) of the University Autònoma de Barcelona. Her research interests include high performance simulation, agent -based modelling and their applications, service systems, integration, resource consumption, and execution time.

Interests

Architectural Support For Programming Languages Or Software Development, Architecture Modeling and Simulation Methodologies, Iot, Mobile and Embedded Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Sarita Adve

Sarita Adve

Professor
University of Illinois at Urbana-Champaign
Personal URL

Research Statement

Sarita V. Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign. Her primary research interest is at the hardware-software interface with work spanning computer architecture, programming languages, operating systems, and applications. Her current research is on scalable system specialization and approximate computing.

She co-developed the memory consistency models for the C++ and Java programming languages, which are based on her early work on data-race-free (DRF) models. More recently, her work questioned the conventional wisdom for memory models for heterogeneous systems and showed that DRF is a superior model even for such systems. She is also known for her contributions to cache coherence (she co-developed the simple and efficient DeNovo coherence protocol); hardware reliability (she co-developed software-driven approaches for hardware reliability in the SWAT project and the concept of lifetime reliability aware architectures and dynamic reliability management in the RAMP project); power management (she led the design of GRACE, one of the first systems to implement cross-layer energy management); exploiting instruction-level parallelism (ILP) for memory system performance (she co-authored some of the first papers on exploiting ILP for memory level parallelism); and evaluation techniques for shared-memory multiprocessors with ILP processors (she led the development of the RSIM architecture simulator).

Professor Adve was named a Woman of Vision in innovation by the Anita Borg Institute for Women in Technology in 2012, an IEEE fellow in 2012, an ACM fellow in 2010, and received the ACM SIGARCH Maurice Wilkes award in 2008. For three of the last five years (2014-18), Illinois CS has selected her students' PhD theses as one of the department's two nominations for the ACM doctoral dissertation award. She currently serves as the chair of ACM SIGARCH, on the DARPA/ISAT study group, and on the board of directors of the Computing Research Association (CRA).

She received the Ph.D. and M.S. degrees in Computer Science from the University of Wisconsin - Madison in 1993 and 1989 respectively, and the B.Tech. degree in Electrical Engineering from the Indian Institute of Technology - Bombay in 1987.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architectural Support For Programming Languages Or Software Development, Architectural Support For Security Or Virtualization, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Datacenter-Scale Computing, Dependable Architecture, Instruction, Thread and Data-Level Parallelism, Iot, Mobile and Embedded Architecture, Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Nandita Vijaykumar

Nandita Vijaykumar

PhD student
Carnegie Mellon University
Personal URL

Research Statement

I am a Ph.D. candidate at Carnegie Mellon University, advised by Prof. Onur Mutlu and Prof. Phil Gibbons. My research focuses on the interaction between programming models, system software, and hardware architecture, and explores how richer cross-layer abstractions can enhance performance, programmability, and portability. I am excited about rethinking the roles played by different levels of the stack in the modern era of rapidly evolving, specialized, and data-centric computing landscapes. During my Ph.D., I have been fortunate to intern at Microsoft Research, Nvidia Research, and Intel Labs. I am currently a visiting student at ETH Zurich.

Interests

Architectural Support For Programming Languages Or Software Development, Processor, Memory, and Storage Systems Architecture
Placeholder. No Picture provided by Nadja Holtryd

Nadja Holtryd

PhD student
Chalmers University of Technology
(No URL)

Research Statement

I'm a PhD student at Chalmers University of Technology in Gothenburg, Sweden. My current research focuses on scalable cache partitioning.

Interests

Multiprocessor Systems, Processor, Memory, and Storage Systems Architecture
Picture of Aporva Amarnath

Aporva Amarnath

PhD Candidate
University of Michigan
Personal URL

Research Statement

I am a Ph.D. candidate at the University of Michigan, exploring new and efficient designs and architectures for emerging non-Si CMOS technologies such as Carbon nanotube transistors and Silicon Carbide transistors for my research. My advisor is Prof. Ronald Dreslinski Jr.

Interests

Architecture For Emerging Technologies and Applications
Picture of Martha Kim

Martha Kim

Associate Professor
Columbia University
Personal URL

Research Statement

Martha Kim is an Associate Professor of Computer Science at Columbia University where she leads the ARCADE Lab. Kim's research interests are in computer architecture, parallel programming, compilers, and low-power computing. Her work has explored low-cost chip manufacturing systems, reconfigurable communication networks, and fine-grained parallel application profiling techniques. Her current research focuses on hardware and software techniques to improve the usability of hardware accelerators as well as data-centric accelerator design. Kim holds a PhD in Computer Science and Engineering from the University of Washington and a bachelors in Computer Science from Harvard University. She is the recipient of the 2013 Rodriguez Family Award, the 2015 Edward and Carole Kim Faculty Involvement Award, a 2013 NSF CAREER award, and the 2016 Anita Borg Early Career Award.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Architecture For Emerging Technologies and Applications, Architecture Modeling and Simulation Methodologies, Instruction, Thread and Data-Level Parallelism, Iot, Mobile and Embedded Architecture, Processor, Memory, and Storage Systems Architecture
Picture of Laura Pozzi

Laura Pozzi

Professor
USI Lugano
Personal URL

Research Statement

I am a Professor in the Informatics Faculty at USI Lugano, Switzerland.

I am interested in the interaction between compiler and architecture design, particularly in the field of embedded systems.

My research efforts have mostly revolved around the automation of embedded processor customization, and the definition of innovative reconfigurable fabrics --- again both in terms of how to architect them, and how to compile onto them. Recently, I have also become interested in Approximate Computing, in particular in how to approximate generic gate-level circuits automatically.

Interests

Accelerator-Based, Application-Specific and Reconfigurable Architecture, Iot, Mobile and Embedded Architecture

This website serves women in the field of computer architecture.
© 2018 SIGARCH.