I am an Assistant Professor in the Computer Science and Engineering Department at University of California, San Diego. My research spans and stretches the boundary between computer architecture and system software, with an emphasis on memory and storage systems and domain-specific acceleration. I am particularly interested in architecting emerging memory technologies (e.g., nonvolatile memories and 3D-stacked memory) into future data centers and edge computing systems that execute various applications, e.g., machine learning, big-data analytics, smart home, and smart transportation. I am also interested in developing deep learning to help computer systems design and programming.

Dana Vantrease specializes in hw and sw solutions for custom AI silicon. She has worked on such systems at Amazon Web Services (Inferentia, Trainium), Qualcomm (NPU), and MatX.

My main research focus is in hardware accelerators, especially FPGAs. I have done research in floating point implementations, unsupervised learning, medical imaging, and privacy preserving data processing. At Northeastern I am head of the Reconfigurable Computing Laboratory and a member of the Computer Engineering group. Throughout my career, I have been funded by both government agencies and companies, including AMD, DARPA, NSF, Google, and MathWorks. I am the recipient of a Fulbright Scholar Award and a Charter Member of the IEEE Computer Society Distinguished Contributor Recognition Program. My current research focus is on FPGAs in the data center and FPGAs directly attached to the network.

I am a Professor in the Informatics Faculty at USI Lugano, Switzerland.

I am interested in the interaction between compiler and architecture design, particularly in the field of embedded systems.

My research efforts have mostly revolved around the automation of embedded processor customization, and the definition of innovative reconfigurable fabrics --- again both in terms of how to architect them, and how to compile onto them. Recently, I have also become interested in Approximate Computing, in particular in how to approximate generic gate-level circuits automatically.