I teach computer architecture and design courses at SJSU's computer engineering department. I have 13 years of academic work experience. My research interests includes processor architectures, memory subsystems, and performance evaluations.
I earned my M.Tech. (2011) and Ph.D. (2022) degrees from Amrita Vishwa Vidyapeetham in Bangalore, India, where I worked on low-power cache architecture and fine-grain data classification in cache coherence mechanisms to improve system performance. My work has appeared in computer architecture conferences (PDP) and the JPDC journal.

Computer Science Engineer, specializing in Hardware and Network Systems from SUNY Buffalo. Highly passionate about Research in the field of VLSI , Computer Architecture and Hardware Security. Also, I have a great interest in the field of Routers and Switches, MIMO technology and VLSI Digital Circuit designing. Along with my Master's I am also working as a Graduate Assistant in HPVSA Laboratory, in the Dept. of Computer Science Engineering , SUNY Buffalo. My current research is on design and optimization of Physically Unclonable Functions (PUF), which could act as a fingerprint for semiconductor devices.

Furthermore, I have obtained my Bachelor's degree in Electronics and Communication Engineering from SRMIST,Chennai,India. During my undergrad I sincerely worked under my Professor for the research project - on Tunnel Field Effect Transistor, which we presented at the National Conference Silicon'18. Our paper "Design Optimization of Tunnel Field Effect Transistor" was published in International Journal of Recent Technology and Engineering (IJRTE) in March 2019.

The amalgamation of Electronics, Computers and Communications have helped me to pave stronger base for the skills needed in the field of Computer Hardware and Computer Networks.

Jun Yang is a William Kepler Whiteford Professor of Electrical and Computer Engineering Department at the University of Pittsburgh. Prior to joining the University of Pittsburgh, she was an assistant professor of the Computer Science and Engineering Department at University of California, Riverside. Jun received her bachelor from Nanjing University, China, and her PhD from the University of Arizona in 1995 and 2002 respectively. Jun’s research is in the broad area of computer architecture and her recent focuses include GPU designs, architecture level security, emerging memory technologies, 3D integration, and power and thermal management techniques. Jun is a recipient of NSF CAREER award in 2008, IEEE MICRO Top Picks award in 2010, and best paper awards of ISLPED 2013 and ICCD 2007. She was on the editorial board of IEEE Computer Architecture Letters, and she has served in the Organizing and Technical Program Committee in ISCA, MICRO, and HPCA, for many years. She has been included in the HPCA hall of fame since 2017.

I am a PhD candidate in the Department of Computer Science & Engineering at the University of California, Riverside. I work with Distinguished Prof. Laxmi Narayan Bhuyan and Prof.Daniel Wong and am a member of SoCal Lab at UCR. My interest lies in Computer Architecture , GPGPU Architecture design, High Performance Computing, Fault-Tolerance systems. I have worked on multiple projects on Data- Dependent Applications on GPGPU, Low power Design of GPGPU Execution units and have achieved notable improvements in terms of Performance gain and Power and Area saving.