Sandhya Dwarkadas is the Walter N. Munster Professor and Chair of Computer Science at the University of Virginia. Previously, she was the Albert Arendt Hopeman Professor of Engineering at the University of Rochester, where she was professor of computer science with a secondary appointment in electrical and computer engineering, and also served as department chair for 6 years. She received the 2020 Edmund A. Hajim Outstanding Faculty Award from the University of Rochester. She received her Bachelor’s degree from the Indian Institute of Technology, Madras, India, and her M.S. and Ph.D. from Rice University. She is a fellow of the ACM and IEEE. She was co-chair of the CRA-WP board and steering committee from 2019-2022 and has been on the CRA-WP board since 2010.
Her areas of research interest include parallel and distributed computing, computer architecture, and the interaction and interface between the compiler, runtime/operating system, and underlying architecture. She has made fundamental contributions to the design and implementation of shared memory both in hardware and in software, and to hardware and software energy- and resource-aware configurability.

Vijayalakshmi Saravanan received her Ph.D. in Computer Science and Engineering from VIT University, India under Erasmus Mundus Fellowship (EURECA) as research exchange student at Mälardalen University, Sweden and visiting researcher at Ryerson University, Canada. She is currently an Assistant Professor in Practice at University of Texas, San Antonio (UTSA) in the department of Computer Science. Prior to this, she was a Postdoctoral Associate at UB (University at Buffalo), The State University of New York, USA and University of Waterloo, Canada under the prestigious “Schlumberger Faculty for the Future” Fellowship award (2015-2017). She is having 10 years of teaching experience in two premier Universities VIT and Amrita Vishwa Vidyapeetham, India. Dr. Saravanan has published many technical articles in scholarly international journal and conferences. She is serving as technical reviewer and program committee member for reputed conference & journals such as GHC, SIGCSE and Springer. Her research interests include Power-Aware Processor Design, Big Data, IoT and Computer Architecture. She is a Senior Member of IEEE & ACM, CSI, Ex-Chair for IEEE-WIE VIT affinity group, India (2009-2015), NPA (National Postdoctoral Association) Annual Meetings committee, Workshop/IIA Co-Chair (2017-2018) Poster committee Co-chair (2018-2019) and a Board member of N2WOMEN (Networking Networking Women).

I am a research scholar in the Electrical Engineering and Computer Science department at University of California, Irvine advised by Prof. Nader Bagherzadeh. I am interested lie in Accelerator based architecture, memory systems, multicore and parallel computing, and heterogeneous architectures. Currently, I am working on mitigating memory bottleneck in deep neural networks (DNN) accelerator based architectures.