I am an Assistant Professor and an SK Hynix Faculty Fellow at the Electrical Engineering and Computer Sciences department of University of California, Berkeley. My research interests are in the area of computer architecture, with a special focus on specialized accelerator, heterogeneous architecture, and agile VLSI design methodology. Previously, I was a Senior Research Scientist at NVIDIA Research and received my Ph.D. degree in 2016 from Harvard University.

My work has been awarded a Distinguished Artifact Award at ISCA 2023, the Best Paper Award at DAC 2021, the Best Paper Award at JSSC 2020, a Best Paper Award at MICRO 2019, Top Picks in Computer Architecture (2014), and Honorable Mentions (2019*2). My Ph.D. dissertation was nominated by Harvard for ACM Doctoral Dissertation Award. I am an SK Hynix Faculty Fellow and a recipient of an NSF CAREER Award, the 2022 IEEE TCCA Young Computer Architect Award, a Google Faculty Rising Stars Award in Systems Research, a Google Research Scholar Award, a Facebook Research Award, an Okawa Foundation Research Grant, and the inaugural Dr. Sudhakar Yalamanchili Award.

Anne Bracy is a Senior Lecturer in Computer Science at Cornell University. Prior to teaching at Cornell, Dr. Bracy was a Principal Lecturer and Coordinator of Undergraduate Research in Computer Science at Washington University in St Louis. She was also a Research Scientist at the Microarchitecture Research Lab at Intel in Santa Clara, California.

Dr Bracy received her PhD from University of Pennsylvania for her work on instruction fusion under the supervision of Amir Roth. Prior to her doctoral studies she was a student at Stanford University, where she was inducted into the Phi Beta Kappa honor society.

I am a fifth-year PhD student in electrical engineering at Stanford advised by Mark Horowitz. I received my B.S. in Electrical Engineering and Business, Economics, and Management from Caltech in 2019 and my M.S. in Electrical Engineering from Stanford in 2021. My research is supported by the Quad Fellowship (2023 to 2024) and Stanford's Knight-Hennessy Graduate Fellowship (2019 to 2022).

I am broadly interested in hardware design for cryptography and machine learning applications. I am curious about the security implications of enabling faster execution of cryptographic protocols and worked on designing a fast extended GCD algorithm and accelerator for constant-time modular inversion and verifiable delay functions. On the machine learning side, I am working on dynamically adapting the execution of state-of-the-art models for use in real-time systems and am working on accelerating dynamic transformer models for computer vision in an ongoing collaboration with NVIDIA. I previously worked on building a flexible memory generator as part of an agile software-hardware co-design flow with Stanford's Agile Hardware (AHA) Project. As part of my research, I have worked on taping out chips in SKY130nm, TSMC16nm, and GF12nm. During the summer, I have interned with Meta Reality Labs, NVIDIA's Architecture Research Group, Apple, Microsoft, and Intel.

Hi, I am Xiaoxiao (Sia) Li. Now I am a postdoc in the CS department at Princeton. I am fortunate to be advised by Prof. Kai Li and Prof. Olga Troyanskaya. My current research has been focused on the interdisciplinary field of Machine Learning, Model Interpretability, Medical Data Analysis, and System Privacy. In 2020, I received my Ph.D. degree at Yale University, where I was a member of Image Processing and Analysis Group(IPAG), under the supervision of Prof. James Duncan.