ALCHEMY Workshop (Deadline: Jan 15)

Final Submission Deadline
January 15, 2015

Submitted by Loïc CUDENNEC

Architecture, Languages, Compilation and Hardware support
for Emerging ManYcore systems (ALCHEMY Workshop 2015)

Held in conjunction with ICCS 2015
Reykjavik, Iceland
1-3 June 2015

[1] Submission deadline extended to January 15.
[2] 27 thematic workshops are registered
[3] In addition to the Full Paper submission, we offer a Presentation Only
option (a short abstract is published in a book of abstracts,
but not in proceedings). You may also go for a Poster presentation,
with or without a full paper.

The International Conference on Computational Science (ICCS) is an annual
conference that brings together researchers and scientists from mathematics
and computer science as basic computing disciplines, researchers from various
application areas who are pioneering computational methods in sciences such
as physics, chemistry, life sciences, and engineering, as well as in arts and
humanitarian fields, to discuss problems and solutions in the area,
to identify new issues, and to shape future directions for research.

Massively parallel processors have entered high performance computing
architectures, as well as embedded systems. In June 2014, the TOP500
number one system (Tianhe-2) features the 57-core Intel Xeon Phi
processor. The increase of the number of cores on a chip is expected
to rise in the next years, as shown by the ITRS trends: other examples
include the Kalray MPPA 256-core chip, the 63-core Tilera GX processor
and even the crowd-funded 64-core Parallella Epiphany chip. In this
context, developers of parallel applications, including heavy
simulations and scientific calculations will undoubtedly have to cope
with many-core processors at the early design steps.

In the two past sessions of the Alchemy workshop, held together with
the ICCS meeting, we have presented significant contributions on the
design of many-core processors, both in the hardware and the software
programming environment sides, as well as some industrial-grade
application case studies. In this 2015 session, we seek academic
and industrial works that contribute to the design and the
programmability of many-core processors.

Topics include, but are not limited to:
– Programming models and languages for many-cores
– Compilers for programming languages
– Runtime generation for parallel programming on manycores
– Architecture support for massive parallelism management
– Enhanced communications for CMP/manycores
– Shared memory, data consistency models and protocols
– New operating systems, or dedicated OS
– Security, crypto systems for manycores
– User feedback on existing manycore architectures (e.g., Adapteva
Epiphany, Intel Phi, Kalray MPPA, ST STHorm, Tilera Gx, TSAR, etc)

This year, there will be two formats for the presentation at the
workshop. The usual full-length paper is 10 pages according to the ICCS
format, and the short-paper format well fitted for works in progress,
with a maximum of 2 pages. The accepted papers for full-length paper
will be published alongside with the ICCS proceedings in Procedia
Computer Science, whereas the short-papers will be presentation and
poster only at the conference (with proceedings and presentations
available from the workshop website).

The manuscripts of up to 10 pages, written in English and formatted
according to the EasyChair templates, should be submitted electronically.
Templates are available for download in the Easychair right-hand-side menu
in a “New submission” mode.

Submission Deadline: Jan 15, 2015
Notification Due: Feb 15, 2015
Final Version Due: Mar 15, 2015
Workshop: Jun 1 – 3, 2015

Akram BEN AHMED, University of Aizu, Fukushima, Japan
Jeronimo CASTRILLON, CFAED / TU Dresden, Germany
Camille COTI, Université de Paris-Nord, France
Stephan DIESTELHORST, ARM Ltd; Cambridge, UK
Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK
Daniel ETIEMBLE, Université de Paris-Sud, France
Bernard GOOSSENS, Université de Perpignan, France
Vincent GRAMOLI, NICTA / University of Sydney, Australia
Jorn W. JANNECK, Lund University, Sweden
Vianney LAPOTRE, Université de Bretagne-Sud, France
Eric LENORMAND, Thales TRT, France
Stéphane LOUISE, CEA, LIST, France
Vania MARANGOZOVA-MARTIN, Université Joseph-Fourier Grenoble, France
Marco MATTAVELLI, EPFL, Switzerland
Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France
Erwan PIRIOU, CEA, LIST, France
Antoniu POP, University of Manchester, UK
Mickaël RAULET, IETR / INSA de Rennes, France
Jason RIEDY, Georgia Institute of Technology, USA
Etienne RIVIERE, Université de Neuchâtel, Switzerland
Thomas ROPARS, EPFL, Switzerland
Martha JOHANNA SEPULVEDA, INRIA, École Centrale de Lyon, France
Osamu TATEBE, AIST / University of Tsukuba, Japan
(to be extended)