October 11, 2020
October 18, 2020
The Workshop on Design and Architectures for Signal and Image Processing (DASIP)
in conjunction with HiPEAC 2021
January 18-20, 2021
Submissions Due: October 18, 2020
The Workshop on Design and Architectures for Signal and Image Processing (DASIP) provides an inspiring international forum for the latest innovations and developments in the field of leading signal, image and video processing and machine learning in custom embedded, edge and cloud computing architectures and systems. The workshop program will include keynote speeches and contributed paper sessions. The 14th edition will be held in conjunction with the 16th HiPEAC Conference in Budapest, Hungary, January 18-20, 2021.
Authors should submit their full papers (up to 12 pages, single-column ACM format) in PDF through the EasyChair system <https://easychair.org/conferences/?conf=dasip2021>. Please use the ACM template <https://www.acm.org/publications/proceedings-template> (Latex only, Master Article Template – sample-manuscript.tex).
Submitted papers are required to describe original unpublished work and must not be under consideration for publication elsewhere. Submissions must be fully anonymous, but authors should not hide previous work, instead, they need to make self-references in the third person. More details on submission requirements, templates and submission instructions are provided on the DASIP website <http://www.dasip-conference.org/>.
Each submission will receive at least three independent double blind reviews from the members of our scientific committee. Authors will be encouraged to take the reviewers’ comments into account when they prepare the final versions of their papers and present the research during the workshop prior to its publication. The workshop proceedings will be published in the ACM International Conference Proceedings Series (ICPS). Paper and keynote presentation slides and tutorial documents will be made available to workshop attendees after the workshop (subject to confidentiality issues).
IMPORTANT DATES (ALL 23:59 A.O.E)
– Abstract submission deadline: October 11th, 2020
– Paper submission deadline: October 18th, 2020
– Notification of acceptance: November 22th, 2020
– Camera ready papers: December 6th, 2020
– Workshop : January 18-20, 2021
LIST OF TOPICS
Prospective authors are invited to submit manuscripts on topics including, but not limited to:
=> Custom embedded, edge and cloud architectures and systems:
– Machine learning and deep learning architectures for inference and training
– Systems for autonomous vehicles : cars, drones, ships and space applications
– Image processing and compression architectures
– Smart cameras, security systems, behaviour recognition
– Edge and cloud processing : special routing, configurable co-processors and low energy considerations
– Real-time cryptography, secure computing, financial and personal data processing
– Computer arithmetic, approximate computing, probabilistic computing, nanocomputing, bio-inspired computing
– Biological data collection and analysis, bioinformatics
– Personal digital assistants, natural language processing, wearable computing and implantable devices
– Global navigation satellite and inertial navigation systems
=> Design Methods and Tools:
– Design verification and fault tolerance
– Embedded system security and security validation
– System-level design and hardware/software co-design
– High-level synthesis, logic synthesis, communication synthesis
– Embedded real-time systems and real-time operating systems
– Rapid system prototyping, performance analysis and estimation
– Formal models, transformations, algorithm transformations and metrics
=> Development Platforms, Architectures and Technologies:
– Embedded platforms for multimedia and telecommunication
– Many-core and multi-processor systems, SoCs, and NoCs
– Reconfigurable ASIPs, FPGAs, and dynamically reconfigurable systems
– Memory system and cache management
– Asynchronous (self-timed) circuits and analog and mixed-signal circuits
=> Organizing committee
– Tomasz Kryjak, AGH University of Science and Technology
– Andrea Pinna, Sorbonne Universite
The Workshop on Design and Architectures for Signal and Image Processing will be held in conjunction with the 16th HiPEAC Conference in Budapest <https://www.hipeac.net/2021/budapest/#/>, Hungary, January 18-20, 2021.
All questions about the workshop and submissions should be emailed to Tomasz Kryjak <email@example.com> or Andrea Pinna <firstname.lastname@example.org>.