FastPath 2015

Final Submission Deadline
March 1, 2015

Submitted by Parijat Dube

FastPath 2015: Fourth International Workshop on Performance Analysis of
Workload Optimized Systems

Co-located with ISPASS 2015
Philadelphia, PA USA
March 29, 2015

The goal of FastPath is to bring together researchers and practitioners
involved in cross-stack hardware/software performance analysis, modeling,
and evaluation of workload optimized systems. With microprocessor clock
speeds being held constant, optimizing systems around specific workloads
is an increasingly attractive means to improve performance.
More precisely, workload optimized systems have hardware
and/or software specifically designed to run well for a
particular application or application class. The types and
components of workload optimized systems vary, but a partial list
includes traditional CPUs assisted with accelerators
(ASICs, FPGAs, GPUs), memory accelerators, I/O accelerators,
hybrid systems, converged infrastructure, and IT appliances.

The importance of workload optimized systems is seen
in their ubiquitous deployment in diverse systems from
cellphones to tablets to routers to game machines to
Top500 supercomputers. Prominent commercial examples of
workload optimized systems include IBM DataPower, IBM Purescale
Application System, IBM Watson, Oracle Exadata, and HP Moonshot Servers.
Exploiting CPU savings and speed-ups offered by workload optimized
systems for application level performance improvement poses several
cross stack hardware and software challenges. These include
developing alternate programming models to exploit massive
parallelism offered by accelerators, designing low-latency,
high-throughput H/W-S/W interfaces,developing techniques to
efficiently map processing logic on hardware, and
cross system stack performance optimization and tuning.
Emerging infrastructure supporting big data analytics,
cognitive computing, large-scale machine learning, mobile computing,
and internet-of-things, further exemplify workload optimized design
at large.

FastPath seeks to facilitate the exchange of ideas on performance analysis
and evaluation of workload optimized systems and seeks papers on a wide
range of topics including, but not limited to:
– Workload characterization and profiling
– Industrial experiences
– GPUs, FPGAs, ASIC accelerators
– Memory, I/O, Storage, Network accelerators
– Hardware/Software co-design
– Workload optimized servers
– Hybrid/Heterogeneous systems
– Measurements and Experimentation
– Analytical techniques
– Performance modeling and prediction
– Performance tooling and optimization
– Programming models for workload optimized systems
– Runtime management systems
– Workload scheduling and orchestration
– Workload optimized clusters in Cloud
– Big Data analytics systems
– Large-scale machine learning systems
– Intelligent/Cognitive systems
– Mobile computing systems
– Converged/integrated infrastructure
– Workload optimized systems from specific domains,
e.g., financial, biological, education, commerce, healthcare.

The authors should submit PDF of a 2-4 page extended abstract by the
submission deadline at
The submission should follow standard format (2-column,
10 to 12-point type, single spaced, 1-inch margins).
Abstracts should provide sufficient detail about the work
and its technical contributions.

Authors of selected abstracts will be invited to present their work
at the workshop. Accepted abstracts will be made available through
the workshop website and hard copies will be provided at the
workshop to the attendees. There are no copyright issues with FastPath,
and thus authors retain the copyright of their work with complete
freedom to submit their work elsewhere.

Submission: March 1, 2015
Author Notification: March 10, 2015
Workshop: March 29, 2015

General Chair:
Erik Altman (IBM)

Program Chairs:
Vijay Janapa Reddi (U-Texas, Austin)
Parijat Dube (IBM)

Web Chair: Augusto Vega (IBM)

David Brooks, Harvard University
Trey Cain, Qualcomm Research
Mike Ferdman, Stony Brook University
Sudhanva Gurumurthi, AMD, University of Virginia
Eric Van Hensbergen, ARM Research
Arrvindh Shriraman, Simon Fraser University
Devesh Tiwari, Oak Ridge National Lab
Sudhakar Yalamanchili, Georgia Tech
Chuanjun Zhang, Intel