Call for Papers:

FCCM 2021

Abstract or Paper Registration Deadline
January 4, 2021
Final Submission Deadline
January 11, 2021

The 29th IEEE International Symposium On Field-Programmable Custom Computing Machines
Virtual with Optional In-person Attendance
May 9 – May 12, 2021

Submissions Due: January 18, 2021

The IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) is the original and premier forum for presenting and discussing new research related to computing that exploits the unique features and capabilities of FPGAs and other reconfigurable hardware. Submissions are solicited on the following topics related to Field Programmable Custom Computing Machines (FCCMs) including, but not limited to:

– Novel reconfigurable architectures, including overlay architectures
– Architectures for high performance and/or low power computing
– Security assessment and enhancements for reconfigurable computing
– Specialized memory systems including volatile, non-volatile, and hybrid memory subsystems
– Emerging technologies with in-field reconfiguration abilities
– Clusters, data centers, or large systems of reconfigurable devices
– Heterogeneous programmable architectures
Abstractions, Programming Models, and Tools
– Abstractions, programming models, interfaces, and runtimes, including virtualization
– New languages and design frameworks for spatial or heterogeneous applications
– High-level synthesis and designer productivity in general
– Software-Defined-systems (e.g. radio, networks, frameworks for new domains)
– Customizable soft processors systems
– Run-time management of reconfigurable hardware
– System resilience/fault tolerance for reconfigurable hardware
– Evolvable, adaptable, or autonomous reconfigurable computing systems
– Security assessment and enhancement of run-time reconfiguration
– Data center or cluster with reconfigurable applications
– New uses of run-time reconfiguration in applications-specific systems
– Applications that utilize reconfigurable technology for performance and efficiency, and particularly submissions that make comparisons with other highly parallel architectures such as GPUs or DSPs
– Novel use of state-of-the-art commercial FPGAs

Submission Website:

Important Dates:
All deadlines apply to the Anywhere on Earth (UTC – 12) timezone

Abstracts Due (All Papers)                                 January 11, 2021
Submissions Due (All Papers)                           January 18, 2021
Rebuttal Period                                                    February 8 – 12, 2021
Notification of Acceptance (All Papers)          March 8, 2021
Demo Night Submissions                                  March 22, 2021 (No Extensions)
Notification of Acceptance (Demo Night)      March 29, 2021
Camera-Ready Submission                               April 5, 2021
Early Registration Deadline                              TBD
Conference                                                            May 9 – May 12, 2021

Organizing Committee:
General Chair                                   Christophe Bobda (University of Florida)
Program Chair                                  Greg Stitt (University of Florida)
Publications Chair                           Jakub Szefer (Yale University)
Finance Chair                                   Andrew Schmidt (University of Southern California ISI)
Workshops Chair                             Laura Pozzi (USI Lugano)
Publicity and Website Chair          Xinfei Guo (NVIDIA)
Expo and Demo-Night Chair         Gabriel Weisz (Microsoft)
Panel Chair                                        Farinaz Koushanfar (UCSD)
Sponsorship Chair                            Grace Zgheib (Intel)
Local Arrangement Chair               TBD

Paper Types:
Submissions can be made for any of the three paper types:- Traditional technical papers that introduce and evaluate new technologies. These papers must have strong empirical results and must address major challenges of the corresponding problem.
– Practical papers that make significant practical contributions, including industry papers, as opposed to introducing and evaluating new technologies. For example, new tools built on existing technologies that help practitioners better use FPGAs. Practical papers will be reviewed based on significance and technical soundness of the practical contribution.
– Work-in-progress papers that present promising ideas that are too preliminary to solve all related technical challenges, but still provide some empirical data to make a convincing argument about the potential contribution after maturation.

Paper Formats:
– Long papers are limited to 8 pages. Short papers are limited to 4 pages. The long/short formats apply to technical papers and practical papers. Work-in-progress papers should be submitted as short papers for the initial submission with a (WIP) prefix on the title, and will be given an optional 2 additional pages after acceptance. Submissions accepted as posters will have a 1-page extended abstract.
– Page restrictions for all formats exclude references, which may use additional pages. Submissions violating the formatting requirements may be automatically rejected. Do not submit the same work as more than one of the formats.
– With the exception of work-in-progress papers, accepted papers will have the same page lengths as initial submissions. Short papers will have short oral presentations and long papers may have long or short presentations based on committee decisions on time required to present the material.
– All submissions should be written in English. An online submission link will be available on the FCCM website. Papers must conform to the US letter-sized IEEE conference proceedings format to be reviewed and published. A conformant LaTeX template is available here and a Microsoft Word template is available here. Overleaf users can find the LaTeX template here.