David Brooks, Harvard University
John Sartori, University of Minnesota
– Submissions due: April 29, 2017
– Author notification: June 17, 2017
– Revised papers due: July 15, 2017
– Final versions due: August 19, 2017
– Publication: November/December 2017
Emerging applications for connected sensing and wearable computing create robust demand for ultra-low-power (ULP) edge computing devices and associated system-on-chip (SoC) architectures. In fact, the ubiquity of ULP processing has already made such embedded devices the highest volume processor part in production, with an even greater dominance expected in the very near future. Emerging applications like the internet of everything are calling for a processor embedded in every object, and the number of processors is projected to be in the billions or trillions. At the same time, the explosion of data generated from these devices, in conjunction with the traditional model of using cloud-based services to process the data, places tremendous demands on limited wireless spectrum and energy-hungry wireless networks. Smart, ultra-low-power edge devices are the only viable option that can meet these demands.
This special issue of IEEE Micro will explore novel design techniques for ultra-low-power processors, bridging the gap between VLSI/CAD, microarchitecture, and lower levels of the compute stack, in the context of emerging applications that are driving the ultra-low-power revolution.
Areas of interest for this issue include the following.
– Application-aware design and optimization of ULP processors
– VLSI, CAD, and microarchitecture techniques for ULP processors
– Studies of new device technologies (e.g. TFETs) applied to ULP processors
– Energy harvesting approaches in conjunction with ULP processing
– Power reduction techniques for end-to-end ULP systems, including techniques that target communication costs with smarter edge computation
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