IEEE TC Special Issue on Hardware Security
January 15, 2020
IEEE Transactions on Computer Special Issue on Hardware Security
Submissions Due: January 15, 2020
IEEE Transaction on Computers seeks original manuscripts for a Special Issue on Hardware Security scheduled to appear on July 2020.
Recently, the hardware of computing systems has been a major target for cyber attacks. Unlike software vulnerabilities, hardware attacks and vulnerabilities can be difficult to detect, isolate or prevent. Such hardware attacks include adversarial bus snoopers, hardware trojans, and physical access to the system. Additionally, side-channel attacks and covert-channel attacks typically exploit unanticipated information leakage due to hardware implementation or resource sharing. The recent Meltdown and Spectre attacks are prominent examples of vulnerabilities resulting mainly from specific hardware implementations. Moreover, emerging memory technologies, such as non-volatile memories (NVMs), further facilitate hardware attacks due to data remanence. Finally, in cloud systems where limited control of the surrounding environment is an acceptable trade-off, the presence of hardware attacks and vulnerabilities becomes even more plausible. In this special issue on Hardware Security for IEEE Transactions on Computers (TC), we invite original articles that address issues related to the security of hardware components of computing systems.
Topics of interest to this special issue include, but not limited to:
- Security Analysis of Commercial Trusted Execution Environments (TEEs)
- Performance Optimizations for Secure Hardware Architectures
- New Attack Models, Vulnerabilities, and Countermeasures for Emerging Architectures and Technologies
- Software Support (e.g., compiler passes) for Leveraging Architectural Support for Security
- Architectural Optimizations for Security Primitives, such as Oblivious RAM (ORAM), Homomorphic Encryption (HE), etc.
- Mitigations of Hardware Vulnerabilities, Such as Safe Speculation and Hardware Partitioning
- Secure-by-Design Hardware Architectures, Especially for Emerging Processors (e.g., RISC-V)
- Secure Storage and Memory Systems
- Hardware Support for Detecting Anomalies (e.g., Hardware Trojans)
- Architectural and System Support for Privacy-Preserving Computation
Submitted articles must not have been previously published or currently submitted for journal publication elsewhere. As an author, you are responsible for understanding and adhering to the Transactions submission guidelines. Those guidelines are available on the IEEE Computer Society web site, www.computer.org. Please thoroughly read these before submitting your manuscript. Please submit your paper to Manuscript Central at https://mc.manuscriptcentral.com/tc-cs
Please note the following important dates.
- Submission Deadline: January 15, 2020
- Reviews Completed: March 1, 2020
- Major Revisions Due: April 1, 2020
- Reviews of Revisions Completed: May 1, 2020
- Notification of Final Acceptance: June 1, 2020
- Publication Materials for Final Manuscripts Due: June 15, 2020
- Publication date: July 2020.
Please address all other correspondence regarding this special issue to Lead Guest Editor Amro Awad (email@example.com).
|Lead Guest Editor Amro Awad, Ph.D.
University of Central Florida (UCF)
|Guest Co-EditorRujia Wang, Ph.D.
Illinois Institute of Technology (IIT)