Call for Papers:

International Symposium on Hardware Oriented Security and Trust

Final Submission Deadline
November 8, 2016

IEEE International Symposium on Hardware Oriented Security and Trust (HOST 2017)
McLean, Virginia, USA
May 3-5, 2016

Abstract Deadline: November 1, 2016
Paper Submission Deadline: November 8, 2016
Notification of Acceptance: January 31, 2017
Camera-ready Version: February 28, 2017
Hardware Demo Proposal: March 15, 2017

IEEE International Symposium on Hardware Oriented Security and Trust (HOST) aims to facilitate the rapid growth of hardware-based security research and development. HOST highlights new results in the area of hardware and system security. Relevant research topics include techniques, tools, design/test methods, architectures, circuits, and applications of secure hardware.

HOST 2017 invites original contributions related to, but not limited by, the following topics:
– Hardware Trojan attacks and detection techniques
– Hardware techniques to facilitate software and/or system security
– Hardware-based security primitives (PUFs, RNGs)
– System-on-chip (SoC) security
– Side-channel attacks and protection
– Security, privacy, and trust protocols
– Metrics, policies, and standards related to hardware security
– Hardware IP trust (watermarking, metering, trust verification)
– Trusted manufacturing including split manufacturing and 3D ICs
– Security analysis and protection of Internet of Things (IoT)
– Secure and efficient implementation of crypto algorithms
– Reverse engineering and hardware obfuscation
– Supply chain risks mitigation (e.g., counterfeit detection & avoidance)
– Hardware tampering attacks and protection
– Applications of hardware security to secure system development

You can register and submit your paper at: The page limit is 6 pages, double column, IEEE format, with a minimum font size of 10 points. Submissions are anonymous and must not identify the authors, directly or indirectly, anywhere in the manuscript.

Students can participate in a hardware demo session by submitting a 1-page proposal describing the research and features to be demonstrated on an FPGA or other hardware platform. Please upload your proposal to EasyChair by March 15, 2017.
A best paper award will be given to paper whose first author is a full-time student.
A best presentation award will be given to a speaker who is a full-time student.
Travel grants are available for graduate and undergraduate students.

General Chair:
William H. Robinson, Vanderbilt University

Program Chair:
Swarup Bhunia, University of Florida