JLPEA special issue on Emerging Network-on-Chip Architectures for Low Power Embedded Systems
January 31, 2017
Journal of Low Power Electronics and Applications (JLPEA)
Special issue on Emerging Network-on-Chip Architectures for Low Power Embedded Systems
Deadline for manuscript submissions: January 31, 2017
Network-on-Chip emerged in recent years as a viable solution for the design of manycore embedded systems of the next generation. However, communication infrastructure scalability, memory bottleneck and parallelization of tasks, just to cite few examples, are becoming the limiting factors that hardware designers and software developers will be facing in the upcoming years.
This Special Issue on “Emerging Network-on-Chip Architectures for Low Power Embedded Systems” will focus on emerging approaches and recent advances on architectures, design techniques, modeling and prototyping solutions for the design of power/performance efficient Network-on-Chip systems in the manycore era.
Guest Editor: Prof. Dr. Davide Patti