Call for Papers:

Networks-on-chip again on the rise: From emerging applications to emerging technologies

Final Submission Deadline
October 18, 2020

Micromachines Special Issue
Networks-on-chip again on the rise: From emerging applications to emerging technologies

Submissions Due: October 18, 2020

Special Issue Editors

Prof. Dr. Davide Bertozzi Website
Guest Editor
Engineering Department, University of Ferrara, 44122, Italy
Interests: interconnection networks, embedded computing, emerging technologies, design automation
Prof. Dr. José L. Abellán Website
Guest Editor
Computer Science and Engineering Department, Universidad Católica San Antonio de Murcia, 30107, Spain
Interests: computer architecture, interconnection networks, silicon photonics
Prof. Dr. Mahdi Nikdast Website
Guest Editor
Electrical and Computer Engineering Department, Colorado State University, Fort Collins, 80523, USA
Interests: silicon photonics, high-performance computing systems, interconnection networks

Special Issue Information

Dear Colleagues,

Twenty years after the advent of interconnection networks to tackle the on-chip communication bottleneck, integrated computing platforms are again interconnect-dominated. On the one hand, the future of computing beyond Moore’s law and Dennard scaling is moving towards Systems-in-Package (SiP) based computing platforms that leverage advanced integration technologies such as 2.5D or 3D stacking. On the other hand, the advent and consolidation of data-intensive applications from artificial intelligence and big data analytics is putting unprecedented pressure on interconnection fabrics at each layer of the compute hierarchy, such as networks-on-chip (NoCs) and networks-in-package (NiPs).

This Special Issue seeks contributions on the latest advancements on chip- and package-scale interconnection systems, architectures, and/or circuits, capable of addressing the communication bottleneck raised by emerging data-intensive applications. The interest is in interconnect solutions for big data architectures across the computing continuum (from Edge computing to HPC) pursuing synergistic goals such as effective system integration (e.g., architectures for 2.5D or 3D-stacking) or architecture specialization (e.g., deep learning accelerators), and in any case striving to push performance boundaries under constant power budgets (e.g., approximate communication). At the same time, we welcome contributions on emerging technologies for on-chip and on-package networking (e.g., silicon nanophotonic networks, wireless NoCs, RF interconnects) with a focus ranging from disruptive devices to novel system concepts through architecture design methods. At the intersection of the above research directions, topics of interest include interconnect solutions for unconventional computing paradigms, such as  in-memory computing, neuromorphic computing or reconfigurable computing.

Prof. Dr. Davide Bertozzi
Prof. Dr. José L. Abellán
Prof. Dr. Mahdi Nikdast
Guest Editors
Manuscript Submission Information

Manuscripts should be submitted online at by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All papers will be peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 1600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI’s English editing service prior to publication or during author revisions.


  • Communication bottleneck
  • Big data architectures
  • Deep learning hardware
  • Networks-on-chip
  • Networks-in-package
  • Communication fabric customization
  • Approximate communication
  • 2.5D and 3D integration
  • Emerging interconnect technologies
  • Communication in unconventional computing
Published Papers
This special issue is now open for submission.