April 14, 2023
April 21, 2023
The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip, package-scale, chip-to-chip, and datacenter rack-scale communication technology, architecture, design methods, applications and systems. NOCS brings together scientists and engineers working on NoC innovations and applications from inter-related research communities, including discrete optimization and algorithms, computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation.
NOCS’23 — Journal-Integrated Publication Model: All accepted papers will be published in an IEEE Design & Test Special Issue.
Please take a look at the NOCS webpage (https://nocs2023.github.io/) for more information. We look forward to receiving your submissions and seeing you at the symposium!
All papers must represent mature and original work, and not be published or submitted for publication in other conferences and journals. A double-blind review process will be enforced. Authors must not reveal their identity directly or indirectly. Papers must be in PDF format and should strictly follow IEEE Design & Test style and formatting (https://ieee-ceda.org/publication/ieee-design-test-dt/author-info), with an exemption of a 6,500 word limit and a maximum of 18 references.
Below is a summary of requirements from IEEE Design & Test:
- A 100-word abstract.
- Article title should not exceed 9 words.
- No more than 6,500 words, including references and illustrations.
- No more than 18 references.
- Each figure and table is counted, on average, as 200 words.
All papers must be submitted to NOCS 2023 through softconf: https://softconf.com/esweek23/nocs2023/