September 20, 2015
Journal of Real-Time Image Processing (Springer)
Special Issue on Real-Time Energy-Aware Circuits and Systems for HEVC
and for its 3D and SVC Extensions
Submissions Due: September 20, 2015
The Journal of Real-Time Image Processing (ISI IF=1.111) is an international
journal focused on real time aspects of image and video processing systems and
algorithms for industrial, medical, consumer electronics, portable and
embedded device applications. Under this very specific domain, it presents
practical, low-cost, and real-time processing architectures and systems, as
well as tools, simulation and modeling for real-time processing algorithms and
Since its formal approval, in 2013, the High Efficiency Video Coding (HEVC)
standard has established as the new state of the art on video compression.
When compared with the previous standards, it has been shown that HEVC
encoders can achieve equivalent subjective visual quality as H.264/AVC
encoders, when using approximately 50% less of the bit rate. However, such
coding efficiency comes at cost of a substantial increase of the computational
complexity of both the video encoder and the decoder. As a consequence,
real-time implementations of HEVC codecs is still an open and challenging
task, only attained by using special purpose circuits and systems.
Complementarily, the recent advent of 3D video technologies and of Scalable
Video Coding (SVC) extensions has pushed the formal definition of the HEVC,
together with the development of convenient high-throughput and real-time
encoding/decoding systems and supporting hardware.
However, although conventional approaches often relying on programmable and/or
dedicated parallel processing platforms already allow achieving a significant
performance level, important compromises have to be established in order to
cope with the strict energy efficiency requirements imposed at the several
different application domains (e.g. mobile, battery supplied and hand-held
devices). As a consequence, energy efficiency is gradually becoming one
fundamental constraint and requisite for video encoding/decoding systems
design, often requiring the adoption of new technologies and
micro-architecture design approaches.
This special issue is mainly focused on the new design and development trends
of energy efficient and real-time processing architectures for HEVC systems
design. Topics of interest cover all aspects of this research domain,
including not only architectures but also algorithms and circuits.
Prospective authors are invited to submit manuscripts related to efficient
implementations of real time HEVC encoding systems and/or its 3D and SVC
extensions. Potential topics of interest include, but are not limited to:
– Low-latency HEVC encoding circuits and systems for interactive applications
– High-throughput VLSI hardware for HEVC codecs (e.g. Ultra-HD 8k)
– ASICs and dedicated architectures for real-time processing
– Multi-core and multi-processor systems, SoCs, and NoCs
– Dynamically reconfigurable/adaptable encoding and decoding systems
– Energy-aware real-time HEVC codecs supported on embedded processors (e.g.
ARM’s big.LITTLE), embedded GPUs (e.g., ARM’s Mali, NVIDIA’s Tegra) or low
power FPGA-based SoCs (e.g. Xilinx’s Zynq)
– Low-power and energy-aware HEVC codec design techniques
– Performance-power-energy aware strategies
– HEVC SW/HW co-design and partitioning
– Optimized memory hierarchies and system organization for real-time HEVC
Authors from academia and industry working in the above or closely related
research areas are invited to submit original manuscripts that have not been
published and are not currently under review by other journals or conferences.
All potential authors are requested to volunteer as reviewers in the
peer-review process for manuscripts submitted for this special issue.
To ensure that all manuscripts are correctly identified for consideration by
the Special Issue, the authors should select “S.I.: Real-Time Energy-Aware
Circuits and Systems for HEVC and 3D/SVC” when they reach the “Article Type”
step in the submission process. For further questions or inquiries, please
contact the Guest Editors.
Manuscript Submission: September 20, 2015
Acceptance Notification: March 31, 2016
Final Manuscript: June 30, 2016
– Leonel Sousa, IST, Univ. Lisboa (Leonel.Sousa@tecnico.ulisboa.pt)
– Nuno Roma, INESC-ID, Univ. Lisboa (Nuno.Roma@inesc-id.pt)