Workshop on Hardware/Software Techniques for Minimizing Data Movement
August 14, 2017
August 14, 2017
Workshop on Hardware/Software Techniques for Minimizing Data Movement (Min-Move 2017)
in conjunction with PACT 2017
September 9, 2017
Submission deadline: Aug 14, 2017 (Early submissions are encouraged for a possible earlier notification.)
The goal of achieving exascale performance under stringent power budget is important, exciting, and challenging. One of the biggest impediments in achieving this goal is the excessive data movement across different levels of the memory hierarchy. In this workshop, we intend to discuss innovative ways to reduce this data movement in a variety of architectures (including CPUs, GPUs, handhelds, data centers, IoT, accelerators etc.). We welcome all novel submissions that describe hardware, software, or hardware-software co-design techniques to reduce the data movement.
Any idea/technique that can help in reducing the data movement is appropriate for this workshop. Some topics (but not limited to) are:
– Near Data Processing (e.g., near caches or memory or storage devices)
– In-Memory Computing (e.g., in caches or memory or storage devices)
– Approximate Computing (e.g., load value approximations)
– Cache/DRAM Locality Optimizations
– Data Compression Techniques
– Emerging Memory Technologies (e.g., STT-RAM, Memristor)
– Non Von-Neumann Architectures (e.g., Quantum Architectures, Automata Processor)
– Interconnection Architectures (e.g., on-chip, off-chip, Ethernet, interposer system, flexible interconnects for FPGA)
– Programming and Language Support for Minimizing Data Movement
Please use the standard LaTeX or Word ACM templates. The length (including references and other material) of the paper should not exceed 6 pages, with minimum length of 2 pages. Email your paper to all the organizers by the deadline (see Important Dates below).
An online version of all the papers will be available on the workshop website. This choice allows authors to use feedback from the workshop to extend their work for future publication.
Adwait Jog, College of William and Mary
Eun Jung (EJ) Kim, Texas A&M University
Murali Annavaram (USC)
Rajeev Balasubramonian (Utah)
Reetuparna Das (UMich)
Lizy John (UT Austin)
David Kaeli (Northeastern)
Onur Kayiran (AMD)
Hyesoon Kim (Gatech)
Asit Mishra (Intel)
Lawrence Rauchwerger (Texas A&M)
Sudha Yalamanchalli (Gatech)
Please contact the organizers if you have any questions. Please include “Min-Move: ” in the email subject line.