Workshop on Multi-Objective Many-Core Design (Deadline Extension)

Final Submission Deadline
December 8, 2014

Submitted by Stefan Wildermann

2nd International Workshop on Multi-Objective Many-Core Design (MOMAC)
in conjunction with ARCS 2015
Porto, Portugal
March 24, 2015

Regular Paper submission deadline (EXTENDED): December 8, 2014

Special Call for 4-page Position Papers and Tutorials

Paper submission deadline: December 8, 2014 (extended)
Notification of acceptance: January 16, 2015
Final version: February 16, 2015

Semiconductor industry is hitting the utilization wall, resulting in
parallel and heterogeneous many-core architectures. Applications have
to exploit the available parallelism and heterogeneity to meet their
functional and non-functional requirements and to gain performance
improvements. A main challenge originates from many-cores promoting
highly dynamic usage scenarios as already observable in today’s “smart
devices”, where multiple and varying numbers of applications are
running at different points in time. As a consequence, providing
mapping of applications to processor cores which is optimal and
predictable with respect to performance, timing, energy consumption,
safety, security, etc. may not be guaranteed by static design-time
optimization alone. At the same time, pure run-time optimization may
result in unpredictable and non-optimal system states. This workshop
investigates this field of tension of run-time, design-time, and
hybrid design methodologies for the mapping of applications on
many-core systems, particularly addressing the aspect of multiple
conflicting objectives that drive the design.

This field of research includes numerous intermeshed aspects:
– Languages, Models, and Compilers: How to specify, analyze,
parallelize, and compile programs which support dynamic usage
scenarios in many-cores?
– Formal methods, Test, and Verification: How to analyze and verify
predictable execution of applications despite unforeseeable
run-time events?
– Optimization Techniques: Which design-time and run-time techniques
as well as combinations of them provide optimized and predictable
application mapping for many-cores?
– Architecture: Which architectural concepts are required to support
predictability, run-time management and (self-)optimization?

Topics of interest include, but are not limited to:

Multiple Objectives & Predictability
– Performance
– Hard & Soft Real-time
– Energy Efficiency
– Fault Tolerance & Reliability
– Safety
– Security
– Scalability
– Flexibility

– Programming
– Modelling
– Parallelization
– Resource awareness

Design-time Optimization
– Multi-Objective Optimization
– Design Space Exploration
– Verification
– Profiling
– Performance Analysis

Run-time Optimization
– Resource Management
– Temperature and Power Management
– Decentralized vs Centralized Management
– Reconfigurable Computing
– Operating System
– Online Verification
– Auto-tuning
– Machine Learning

– Architectural Predictability
– Reconfiguration
– Power Management
– Benchmarking
– Monitoring

Paper can be submitted as regular papers or as position papers.
Formats requirements:
– up to 8 pages (regular paper) IEEE style
– 4 pages (position paper) IEEE style: Preliminary and exploratory
work are welcome in this category, including wild & crazy ideas.
Authors submitting papers in this category must prepend
“Position Paper:” to the title of the submitted paper.
– This year: Special call for Tutorials, introducing tools and
techniques for modeling, programming, analysis, and optimization
of many-core systems. Each tutorial should be accompanied by a
4-page tutorial paper. The title of a tutorial paper should be
prepended with “Tutorial:”.

The proceedings will be published through VDE Verlag on CD and online
by the IEEE Computer Society through the IEEE Xplore Digital Library.
Papers should not exceed 8 pages (regular papers) or 4 pages (position
& tutorial papers) in IEEE format A4, templates can be found at

PDF submission via EasyChair:

By submitting a paper, the authors accept the copyright form:

Paper submission deadline: December 8, 2014 (extended).

All papers undergo a blind review process. Authors will be notified
until January 16, 2015. Final version is due to February 16, 2015.
All accepted papers will be published in the ARCS Workshop Proceedings
and by the IEEE Computer Society, through the IEEE Xplore Digital Library.

MOMAC will be held conjunction with the 28th International Conference
on Architecture of Computing Systems (ARCS 2015), March 24-27,
2015 in Porto, Portugal.

Stefan Wildermann (FAU, Germany, stefan.wildermann@fau.de)
Michael Glaß (FAU, Germany, michael.glass@fau.de)

Lars Bauer (Karlsruhe Institute of Technology (KIT), Germany)
Jens Gladigau (Robert Bosch GmbH, Germany)
Omar Hammami (ENSTA, France)
Markus Happe (ETH Zurich, Switzerland)
Christian Haubelt (University of Rostock, Germany)
Jörg Hähner (Augsburg University, Germany)
Akash Kumar (National University of Singapore, Singapore)
Martin Lukasiewycz (TUM CREATE, Singapore)
Sanaz Mostaghim (Otto von Guericke University of Magdeburg, Germany)
Mathias Pacher (University of Hannover, Germany)
Gianluca Palermo (Politecnico Di Milano, Italy)
Sophie Quinton (INRIA, France)
Marco Domenico Santambrogio (Politecnico di Milano, Italy)
Muhammad Shafique (Karlsruhe Institute of Technology (KIT), Germany)
Lucian Vintan (Lucian Blaga University of Sibiu, Romania)
Sebastian Voss (fortiss GmbH, Germany)