Call for Participation:

D43D: International Workshop on Design for 3D Silicon Integration

Registration Deadline
May 25, 2014

Submitted by Djordje Jevdjic
D43D: International Workshop on Design for 3D Silicon Integration
June 23-24, 2014
EPFL, Lausanne

Scope & Venue

3D IC is emerging as a promising approach to extend Moore’s law, overcome pin bandwidth limitations, and improve digital platform density and cost beyond a single chip. 3D IC as a technology, however, also introduces a number of key design, methodological, implementation and technological challenges that must be overcome to become practical and cost-effective.
This workshop is a two-day forum that brings together experts from industry and academia to shed light on these near-term to long-term challenges and solutions, and covers topics including, but not limited to, applications requiring 3D, 3D processor, memory and interconnect architectures, thermal management, design methodologies and tools, and testing.

The workshop will take place at EPFL, one of the premier institutions of computer science and engineering, consistently ranked among the most internationally diverse campuses, located on the shores of Lake Geneva in Switzerland.

Registration & Info
For hotel accommodation and workshop information please check our website:
Registration is open until May 25th, 2014.

General Chair:
Babak Falsafi, EPFL

Program Chair:
Pascal Vivet, CEA-LETI

Finance Chair:
Stéphanie Baillargues, EPFL

Website Chair:
Javier Picorel, EPFL

Steering Committee:
David Atienza, EPFL
Ahmed Jerraya, CEA-LETI

The workshop is partially sponsored by EcoCloud ( and IEEE CEDA.