Call for Participation:

NOCS 2016

10th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2016)
August 31 – September 2, 2016
Nara, Japan

The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip, chip-scale, and multichip package scale communication technology, architecture, design methods, applications and systems. NOCS brings together scientists and engineers working on NoC innovations and applications from inter-related research communities, including computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation.

NOCS 2016 will be held in Nara. It is well connected to Kyoto and Osaka. The nearest airport is Kansai International Airport, which is also well connected to many international cities. Nara was the capital of Japan about 1300 years ago. There are historical temples, shrine, palace, and forest encompassed as Historic Monuments of Ancient Nara.

Advanced program, registration, and hotel reservation are available online.

Keynote Talks:
– Near-Field Coupling Integration Technology. Tadahiro Kuroda (Keio University, Japan)
– Identifying On-Chip Communication Requirements for IOT. Rob Aitken (ARM Inc., USA)

Embedded Tutorial:
Inter/Intra-Chip Optical Interconnection Network: Opportunities, Challenges, and Implementations. Jiang Xu (Hong Kong University of Science and Technology, Hong Kong), Yuichi Nakamura (NEC Corp., Japan)

General Co-Chairs:
– Hideharu Amano (Keio University, Japan)
– Partha Pratim Pande (Washington State University, USA)

Technical Program Co-Chairs:
– Hiroki Matsutani (Keio University, Japan)
– Sriram Vangal (Intel, USA)