Call for Participation:

OpenPiton Tutorial

An Introduction to OpenPiton: A Manycore Open Source Processor
Half-day tutorial in conjunction with MICRO 2017
Boston, USA
October 15 2017 (afternoon)

This tutorial will introduce the user to OpenPiton including how to use the framework to build different designs. The tutorial will introduce the verification framework (Verilog simulation), how to synthesize an OpenPiton processor for a Xilinx FPGA board, it will demonstrate booting Linux on an FPGA version of OpenPiton with full networking, it will familiarize users with how to use the OpenPiton framework to target an ASIC tapeout, and it will show users how to configure and extend the OpenPiton architecture to enable architecture research. This tutorial will be hands-on so please bring a laptop.

OpenPiton is an open source framework designed to enable scalable architecture research prototypes from 1 core to 500 million cores. OpenPiton is the world’s first open source, general-purpose, multithreaded manycore processor and framework. OpenPiton leverages the industry hardened OpenSPARC T1 core with modifications and builds upon it with a scratch-built, scalable uncore creating a flexible, modern manycore design. In addition, OpenPiton provides synthesis and backend scripts for ASIC and FPGA to enable other researchers to bring their designs to implementation. On FPGA, OpenPiton provides a new high performance memory controller and ethernet network card. OpenPiton provides a complete verification infrastructure of over 8000 tests, is supported by mature software tools, runs full-stack multiuser Debian Linux, and is written in industry standard Verilog. Multiple implementations of OpenPiton have been created including a taped-out 25-core implementation in IBM’s 32nm process and multiple Xilinx FPGA prototypes.