The RISC-V Reader: An Open Architecture Atlas
Authored by David Patterson, Andrew Waterman
The RISC-V Reader is a concise introduction and reference for embedded systems programmers, students, and the curious to a modern, popular, open architecture. RISC-V spans from the cheapest 32-bit embedded microcontroller to the fastest 64-bit cloud computer. The text shows how RISC-V followed the good ideas of past architectures while avoiding their mistake.
Introduces the RISC-V instruction set in only 100 pages, including 75 figures
– 2-page RISC-V Reference Card that summarizes all instructions
– 50-page Instruction Glossary that defines every instruction in detail
– 75 spotlights of good architecture design using margin icons
– 50 sidebars with interesting commentary and RISC-V history
– 25 quotes to pass along wisdom of noted scientists and engineers
Ten chapters introduce each component of the modular RISC-V instruction set — often contrasting code compiled from C to RISC-V versus the older ARM, Intel, and MIPS architectures — but readers can start programming after Chapter 2.
Praise for The RISC-V Reader:
“I like RISC-V and this book as they are elegant—brief, to the point, and complete.” C. Gordon Bell, a computer architecture pioneer
“This book tells what RISC-V can do and why its designers chose to endow it with those abilities.” Ivan Sutherland, the father of computer graphics