Today we release the second version of QFlex (v2.0) which includes the trace, timing, and FPGA-accelerated simulation modes.
QFlex is an instrumentation framework with several tools for different use cases. We support trace-based simulation to quickly instrument existing QEMU images, timing models to simulate multi-core CPU microarchitectures in detail and an FPGA-accelerated mode which enables high-performing instrumented code. We based our framework on QEMU, a widely-used machine emulator, which is able to boot any machine and execute unmodified applications and operating systems.
QFlex is and always will be a work in progress, and at this stage, we are able to perform full-system simulation of a single server node (for 64-bit ARM). We are working on many other features including multi-node simulation.
You can download QFlex from our GitHub repo. As QFlex is a work in progress, we encourage users to use GitHub issues actively.