This year’s 22nd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’17) has just concluded. ASPLOS’17 represents a milestone across several axes for the community. This year’s attendance was a record 410 registrants. Similarly, ASPLOS’17 had a record number of submissions, with 320 full papers submitted, 54 of which were accepted into the final program. The venue this year, Xi’an, China, once the beginning (or end, depending on your point of view) of the silk road, serves as a unique symbol for the crossroads-like role that ASPLOS serves as a connection between the communities of ACM SIGARCH, SIGOPS and SIGPLAN. Likewise, the conference session tracks span the inter-disciplinary divide, including architecture-oriented topics such as Memory systems and Data Center Architectures and Power Management and PL and OS-oriented topics such as Compiler Optimizations and Virtualization, with many topics being inter-disciplinary themselves, such as Security, and Accelerators.
The papers presented at ASPLOS’17 further highlight the cross disciplinary connections between these three communities. A nearly canonical example of this connection lies in the paper “TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA”, by Trippel et al. This paper, a collaboration between researchers at Princeton and Nvidia, develops a methodology and toolchain for “full-stack” memory consistency model verification, from the high-level language specification, through the compiler to the ISA and ultimately the microarchitectural implementation. In this paper, the authors uncover more than 100 outcomes which C11 disallows that can be expressed in current RISC V microarchitectures due to under-specification in the RISC V documentation among other issues.
Further illustrating the breadth of research presented at ASPLOS’17, two best paper awards were given. The first, “Determining Application-specific Peak Power and Energy Requirements for Ultra-low-power Processors”, Cherupalli et al., the result of a collaboration between researchers at UIUC and the University of Minnesota, tackles the problem of tight-bounded energy and peak power estimates for future IoT and other extreme low-power computing devices. The paper develops a system for hardware-software co-analysis of the particular application running in the embedded system to more accurately estimate maximum power consumption, enabling systems with smaller batteries and/or less aggressive energy harvesting techniques. The second, “Black-box Concurrent Data Structures for NUMA Architectures”, Calciu et al., a collaboration between researchers at VMware, Microsoft Research and Yale University, examines the problem of developing concurrent data structures for modern, multi-socket, shared memory servers which are, in effect, NUMA machines. The proposed technique shows significant gains on contended data structures versus traditional lock-free techniques.
Together with the two best paper awards, the “Most Influential Paper Award” was given to “Automatically characterizing large scale program behavior”, by Sherwood et al., from ASPLOS 2002. This important paper introduced the technique of “Simpoints” for finding representative program fragments, greatly reducing the simulation time needed to receive accurate results.
These awards were given at the conference banquet and outing the evening of Tuesday, 4/11/17. They were followed by attendance of the dramatic “Song of Everlasting Sorrow” show, a lavish spectacle which provided an unforgettable end to the conference’s last full day.
Disclaimer: These posts are written by individual contributors to share their thoughts on the Computer Architecture Today blog for the benefit of the community. Any views or opinions represented in this blog are personal, belong solely to the blog author and do not represent those of ACM SIGARCH or its parent organization, ACM.