Archive of posts tagged: Accelerators
Why the GPGPU is Less Efficient than the TPU for DNNs
The GPGPU’s massive multithreading is unnecessary for DNNs, and imposes performance, area, and energy overheads. By avoiding such multithreading, the TPU is more efficient.
DNN Accelerator Architecture – SIMD or Systolic?
While the concept of hardware acceleration has been around for a while, DNN accelerators are perhaps the first to see the light of commercial adoption due to the AI/ML wave. Giant software corporations, veteran hardware companies, and a plethora of start-ups have...
Mobile SoCs: The Wild West of Domain Specific Architectures
The Moore’s Law engine that we have come to depend upon is sputtering. It is encouraging architects to innovate in alternative ways to keep the industry moving forward. The most widely accepted approach is using domain specific architectures, and as such, in recent...
Intelligent memory architecture with new memory technologies
A previous blog titled “Blurring the lines between memory and compute” by R. Das was a nice summary of the history and the recent trends on addressing the memory wall challenges with process-in-memory (PIM) ideas. This blog would like to further highlight...Subscribe
