Archive of posts tagged: Accelerators
From Hardware Description Languages to Accelerator Design Languages
We need to make it easier to design custom, application-specific hardware accelerators. The potential efficiency gains are enormous, and the cost of deploying accelerators is falling rapidly with the widespread availability of FPGA cards and the increasing...
Catalyzing Computing Podcast – Computer Architecture with Mark D. Hill
[Editor’s Note: This article originally appeared on the CCC blog (part 1 and part 2) and is re-posted here with permission.] A new episode of the Computing Community Consortium‘s (CCC) official podcast, Catalyzing Computing, is now available. In this episode, Khari...
Cryptography for Secure Computing: A New Hardware Acceleration Opportunity
Big Data and artificial intelligence have empowered the data-driven computing paradigm, in which data become the most precious resources. Specifically, if one could make use of data not only of herself, but also from other sources to constitute larger datasets, it...
20 years of NoCs
Twenty years ago research into networks-on-chip (NoCs) was launched with the publication of the foundational Dally and Towles paper, “Route Packets not Wires,” in the Design Automation Conference (DAC) in June 2001. In this blog post, I explore the evolution of...Subscribe
