Archive of posts tagged: Accelerators
Uncertainty in Computation and Computer Architectures, Part 2
In Part 1 of this two-part post, I looked at some of the existing and possible avenues for computer architecture research relating to tracking uncertainty in computations, using the blackscholes benchmark from the PARSEC suite of computer architecture research benchmark applications as a working example. In this post, I’ll outline some existing and possible future paths for computer architects in computation with uncertainty. Just as architectural support and microarchitectural implementations of floating-point number representations improved the ease of implementation of real-valued computations, architectural and microarchitectural support for representations of uncertainty could enable new approaches to trustworthy computation on empirical data.
The Time is Ripe for Disaggregated Systems
Despite being hidden from the end user, datacenters are ubiquitous in today’s life. Massive datacenter installations are the driving force behind social networking, search, streaming services, e-commerce, cloud, and the gig economy. Today’s datacenters are as...
Numerical Encoding for DNN Accelerators
DNN training is emerging as a popular compute-intensive workload. This blog post provides an overview of the recent research on numerical encoding formats for DNN training, and presents the Hybrid Block Floating-Point (HBFP) format which reduces silicon provisioning...
An Academic’s Attempt to Clear the Fog of the Machine Learning Accelerator War
At its core, all engineering is science optimized (or perverted) by economics. As academics in computer science and engineering, we have a symbiotic relationship with industry. Still, it is often necessary for us to peel back the marketing noise and understand...Subscribe
