ISCA 2019 Summary
Every four years, various research conferences spanning different areas of Computer Science are co-located together into a week-long coordinated meeting, Federated Computing Research Conference (FCRC), held in a common place. In 2019, the common place is Phoenix,...
Farewell and Passing the Torch
The SIGARCH elections have concluded and we welcome the new SIGARCH leadership! The new executive committee (EC) will be: Babak Falsafi (Chair), Natalie Enright Jerger (Vice-chair), Karin Strauss (Treasurer), Sarita Adve (Past chair), Joel Emer, Boris Grot, Martha...
Sure, We Have Systems For ML But How About ML For Systems?
The past few years have seen an unprecedented increase in the number of systems targeting machine learning (ML) applications and deep learning in particular (Jeff Dean has compiled a telling graph on the exponentially increasing number of ML papers). From hardware...
Embench™: Recruiting for the Long Overdue and Deserved Demise of Dhrystone as a Benchmark for Embedded Computing
I. Why a New Embedded Benchmark The world will soon be deluged by tens of billions or even hundreds of billions of Internet of Things (IoT) devices, but we still don’t have a high quality, widely reported benchmark to fairly evaluate the embedded computers that power...
To Graduate Students and Assistant Professors in Computer Architecture
We would find it unacceptable for grading in a college-level course to be done by multiple TAs without any rubric or common guidelines. Why is it acceptable for our career-affecting review process?
Hardware Acceleration Opportunities for Machine Learning on Massive Datasets
Data management research has recently been paying more attention on how to run machine learning algorithms efficiently on massive datasets. This blog post focuses on three recent research papers that identify time-consuming data processing operations in machine...
Greater Quantum Efficiency by Breaking Abstractions
Practical quantum computation may be achievable in the next few years, but applications will need to be error tolerant and make the best use of a relatively small number of quantum bits and operations. Compilation tools will play a critical role in achieving these...
ASPLOS 2019 Summary
Researchers in programming languages, operating systems, and computer architecture converged on Providence, RI this April for the 24th edition of ASPLOS. This year’s ASPLOS showed the strength of computer systems research in many areas, from cloud computing to...
A Case for the Scope of Reconfigurable Transistors in Computer Architecture
Reconfigurable field effect transistors (RFET) is expected to offer a lower transistor count and decreased area consumption compared to conventional CMOS. While the semiconductor industry is moving towards sub-10nm transistor technologies, silicon nanowires are...Subscribe
